Inventor
PERRY STEVEN
GB52 patents
⚠️ This page may combine multiple inventors who share the name “PERRY STEVEN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
ALTERA CORP
33 patentsUS8006074B1Aug 23, 2011
Methods and apparatus for executing extended custom instructions
ALTERA CORP21 citations90
US7530046B1May 5, 2009
Chip debugging using incremental recompilation
ALTERA CORP17 citations89
US7076751B1Jul 11, 2006
Chip debugging using incremental recompilation
ALTERA CORP33 citations89
US9647667B1May 9, 2017
Hybrid architecture for signal processing and signal processing accelerator
ALTERA CORP7 citations84
US7913203B1Mar 22, 2011
Method and apparatus for designing a system on multiple field programmable gate array device types
ALTERA CORP11 citations84
US7895549B1Feb 22, 2011
Method and apparatus for implementing a processor interface block with an electronic design automation tool
ALTERA CORP8 citations84
US7873934B1Jan 18, 2011
Method and apparatus for implementing carry chains on field programmable gate array devices
ALTERA CORP9 citations84
US7823092B1Oct 26, 2010
Method and apparatus for implementing a parameterizable filter block with an electronic design automation tool
ALTERA CORP10 citations84
US7392489B1Jun 24, 2008
Methods and apparatus for implementing application specific processors
ALTERA CORP13 citations84
US7234044B1Jun 19, 2007
Processor registers having state information
ALTERA CORP13 citations84
US7437401B2Oct 14, 2008
Multiplier-accumulator block mode splitting
ALTERA CORP12 citations83
US7290174B1Oct 30, 2007
Methods and apparatus for generating test instruction sequences
ALTERA CORP12 citations83
US7058534B1Jun 6, 2006
Method and apparatus for application specific test of PLDs
ALTERA CORP13 citations83
US7162591B1Jan 9, 2007
Processor memory having a dedicated port
ALTERA CORP15 citations82
US7631284B1Dec 8, 2009
Graphical user aid for technology migration and associated methods
ALTERA CORP8 citations79
US10678715B2Jun 9, 2020
Hybrid architecture for signal processing and signal processing accelerator
ALTERA CORP1 citations73
US10268605B1Apr 23, 2019
Hybrid architecture for signal processing and signal processing accelerator
ALTERA CORP1 citations73
US9619423B1Apr 11, 2017
Memory-mapped state bus for integrated circuit
ALTERA CORP4 citations73
US9553591B2Jan 24, 2017
Hybrid architecture for signal processing
ALTERA CORP3 citations72
US9026967B1May 5, 2015
Method and apparatus for designing a system on multiple field programmable gate array device types
ALTERA CORP2 citations63
US8739102B1May 27, 2014
Method and apparatus for designing a system on multiple field programmable gate array device types
ALTERA CORP2 citations63
US7916572B1Mar 29, 2011
Memory with addressable subword support
ALTERA CORP5 citations63
US7360196B1Apr 15, 2008
Technology mapping for programming and design of a programmable logic device by equating logic expressions
ALTERA CORP4 citations63
US11334504B2May 17, 2022
Hybrid architecture for signal processing and signal processing accelerator
ALTERA CORP0 citations62
US7467176B2Dec 16, 2008
Saturation and rounding in multiply-accumulate blocks
ALTERA CORP4 citations62
US7290237B2Oct 30, 2007
Method for programming a mask-programmable logic device and device so programmed
ALTERA CORP4 citations60
US7337101B1Feb 26, 2008
Method and apparatus for extending the capabilities of tools used for designing systems on programmable logic devices to satisfy timing requirements
ALTERA CORP3 citations59
US10372655B1Aug 6, 2019
Memory-mapped state bus for integrated circuit
ALTERA CORP0 citations52
US9985635B2May 29, 2018
Hybrid architecture for signal processing and signal processing accelerator
ALTERA CORP0 citations52
US9229909B1Jan 5, 2016
Method and apparatus for performing requirement-driven discrete fourier transforms and their inverses
ALTERA CORP1 citations52
US8788985B1Jul 22, 2014
Method and apparatus for implementing a processor interface block with an electronic design automation tool
ALTERA CORP0 citations52
US7112991B1Sep 26, 2006
Extended custom instructions
ALTERA CORP1 citations50
US8001509B2Aug 16, 2011
Method for programming a mask-programmable logic device and device so programmed
ALTERA CORP1 citations49
PERRY STEVEN
10 patentsUS8402400B1Mar 19, 2013
Method and apparatus for implementing a processor interface block with an electronic design automation tool
PERRY STEVEN8 citations84
US8825730B1Sep 2, 2014
Matrix decomposition using dataflow techniques
PERRY STEVEN11 citations76
US8793629B1Jul 29, 2014
Method and apparatus for implementing carry chains on FPGA devices
PERRY STEVEN3 citations62
US8499262B1Jul 30, 2013
Method and apparatus for implementing a parameterizable filter block with an electronic design automation tool
PERRY STEVEN4 citations62
US8468476B1Jun 18, 2013
Method and apparatus for designing a system on multiple field programmable gate array device types
PERRY STEVEN3 citations62
US9176912B2Nov 3, 2015
Processor to message-based network interface using speculative techniques
PERRY STEVEN2 citations59
US8191020B1May 29, 2012
Graphical user aid for technology migration and associated methods
PERRY STEVEN1 citations59
US8954714B2Feb 10, 2015
Processor with cycle offsets and delay lines to allow scheduling of instructions through time
PERRY STEVEN0 citations52
US8739108B1May 27, 2014
Method and apparatus for implementing loop-based control in an electronic design automation tool
PERRY STEVEN0 citations50
US8060729B1Nov 15, 2011
Software based data flows addressing hardware block based processing requirements
PERRY STEVEN1 citations50
CHEUNG COLMAN C
1 patentXU LEI
1 patentTONKOVICH ANNA LEE Y
1 patentVELOCYS TECH LIMITED
1 patentJACKSON ROBERT
1 patentZHENG LEON
1 patentVELOCYS INC
1 patentShowing the top 50 of 52 patents by PatentIndex Score.