Inventor
MOONEY PATRICIA M
US13 patents
Patents
13 patentsUS6593625B2Jul 15, 2003
Relaxed SiGe layers on Si or silicon-on-insulator substrates by ion implantation and thermal annealing
IBM182 citations98
US6515335B1Feb 4, 2003
Method for fabrication of relaxed SiGe buffer layers on silicon-on-insulators and structures containing the same
IBM214 citations98
US6855649B2Feb 15, 2005
Relaxed SiGe layers on Si or silicon-on-insulator substrates by ion implantation and thermal annealing
IBM90 citations97
US6709903B2Mar 23, 2004
Relaxed SiGe layers on Si or silicon-on-insulator substrates by ion implantation and thermal annealing
IBM86 citations97
US7271043B2Sep 18, 2007
Method for manufacturing strained silicon directly-on-insulator substrate with hybrid crystalline orientation and different stress levels
IBM17 citations92
US7238589B2Jul 3, 2007
In-place bonding of microstructures
IBM16 citations92
US6833332B2Dec 21, 2004
Method for fabrication of relaxed SiGe buffer layers on silicon-on-insulators and structures containing the same
IBM23 citations92
US7723791B2May 25, 2010
Strained silicon directly-on-insulator substrate with hybrid crystalline orientation and different stress levels
IBM4 citations63
US7709352B2May 4, 2010
In-place bonding of microstructures
IBM1 citations63
US7423303B2Sep 9, 2008
Strained silicon directly-on-insulator substrate with hybrid crystalline orientation and different stress levels
IBM2 citations63
US7396747B2Jul 8, 2008
Hetero-integrated strained silicon n- and p-MOSFETs
IBM4 citations62
US7273800B2Sep 25, 2007
Hetero-integrated strained silicon n- and p-MOSFETs
IBM3 citations62
US7456081B2Nov 25, 2008
In-place bonding of microstructures
IBM0 citations52