Inventor

LIANG MING-CHUNG

TW51 patents

⚠️ This page may combine multiple inventors who share the name “LIANG MING-CHUNG”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

LIANG MING-CHUNG

TAIWAN SEMICONDUCTOR MFG CO LTD

Organosilicate polymer mandrel for self-aligned double patterning process

Cut first self-aligned litho-etch patterning

Cut last self-aligned litho-etch patterning

Self-aligned double patterning

Interconnect structure and method

Cut last self-aligned litho-etch patterning

Cut last self-aligned litho-etch patterning

Interconnect structure and method of forming the same

Self-aligned double patterning

Cut first self-aligned litho-etch patterning

Cut first self-aligned litho-etch patterning

Methods of forming an interconnect structure

Method for forming conducting via and damascene structure

Interconnect structure with vias extending through multiple dielectric layers

Integrated circuit fabrication with a passivation agent

Cut last self-aligned litho-etch patterning

Cut first self-aligned litho-etch patterning

Interconnect structure and method of forming the same

Interconnect structure with vias extending through multiple dielectric layers

Semiconductor device with self-aligned vias

Semiconductor device with self-aligned vias

Curing photo resist for improving etching selectivity

Method for manufacturing a semiconductor device

Semiconductor device and method of forming same

Curing photo resist for improving etching selectivity

MACRONIX INT CO LTD

Method for reducing dimensions between patterns on a photoresist

Method for reducing pitch

Three-dimensional memory structure and manufacturing method thereof

Fabrication method for forming rounded corner of contact window and via by two-step light etching technique

Method of reducing pattern pitch in integrated circuits

Method for reducing dimensions between patterns on a photoresist

Apparatus for cleaning a wafer with shearing stress from slab with curved portion

Vertical batch type wafer cleaning apparatus

Method for reducing dimensions between patterns on a hardmask

Method of fabricating an insulating layer

Process for forming a shallow trench isolation

Method for reducing dimensions between patterns on a photoresist

Method of forming a fluorocarbon polymer film on a substrate using a passivation layer

Operating method of a semiconductor etcher

Protection layer to prevent under-layer damage during deposition

TAIWAN SEMICONDUCTOR MFG

Double patterning strategy for contact hole and trench in photolithography

Interconnect structure and method of forming the same

Method for fabricating low-k dielectric and Cu interconnect

Method for fabricating low-k dielectric and Cu interconnect

Metal interconnect structure and process for forming same

LIANG MING-CHUNG

Double patterning strategy for contact hole and trench in photolithography

Integrated circuits and methods for forming the integrated circuits

TSAI HSIN-YI

Method and apparatus of forming a via

HSIEH WEN-KUO

Method of forming via holes

TSAI CHI-MING

Reduction of OCD measurement noise by way of metal via slots