Inventor

JANG LINUS

US19 patents

⚠️ This page may combine multiple inventors who share the name “JANG LINUS”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

JANG LINUS

GLOBALFOUNDRIES INC

Methods for fabricating integrated circuits using self-aligned quadruple patterning

Methods of patterning features having differing widths

Dummy gate used as interconnection and method of making the same

Methods of forming gate structures for semiconductor devices using a replacement gate technique and the resulting devices

Methods for fabricating integrated circuits including selectively forming and removing fin structures

Devices with chamfer-less vias multi-patterning and methods for forming chamfer-less vias

Methods of forming features having differing pitch spacing and critical dimensions

Methods of patterning features having differing widths

Methods of forming integrated circuits and multiple critical dimension self-aligned double patterning processes

FinFET formation using double patterning memorization

Dummy gate used as interconnection and method of making the same

IBM

Sidewall image transfer process for multiple gate width patterning

Freestanding spacer having sub-lithographic lateral dimension and method of forming same

Removal of semiconductor growth defects

Removal of semiconductor growth defects

Replacement metal gate including dielectric gate material

UNIV ILLINOIS

Energy-efficient optoelectronic smart window

JAIN KANTI

Energy-efficient smart window system

GLOBAL FOUNDRIES INC

Methods of forming trench/hole type features in a layer of material of an integrated circuit product