Inventor

KAPIL SANJIV

US17 patents

⚠️ This page may combine multiple inventors who share the name “KAPIL SANJIV”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

KAPIL SANJIV

KAPIL SANJIV

Device for assisting weight control

Cache coherent support for flash in a memory hierarchy

Method and apparatus for modulating the width of a high-speed link

Memory power profiling

Hybrid interleaving in memory modules by interleaving physical addresses for a page across ranks in a memory module

Single interface access to multiple bandwidth and power memory zones

Extended main memory hierarchy having flash memory for page fault handling

SUN MICROSYSTEMS INC

Power throttling in a memory system

Hardware architecture for a multi-mode power management system using a constant time reference for operating system support

Constant time reference for OS support in different frequency modes

Clock enable throttling for power savings in a memory subsystem

Cache coherency for multiple independent cache of a domain

ORACLE INT CORP

Hardware for table scan acceleration

Facilitating efficient prefetching for scatter/gather operations

Memory bus protocol to enable clustering between nodes of distinct physical domain address spaces

Remote-key based memory buffer access control mechanism

Hardware for performing a database operation