Inventor
HEASLIP JAY G
US10 patents
⚠️ This page may combine multiple inventors who share the name “HEASLIP JAY G”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
IBM
9 patentsUS6643807B1Nov 4, 2003
Array-built-in-self-test (ABIST) for efficient, fast, bitmapping of large embedded arrays in manufacturing test
IBM89 citations96
US5634026AMay 27, 1997
Source identifier for result forwarding
IBM21 citations90
US9740629B2Aug 22, 2017
Tracking memory accesses when invalidating effective address to real address translations
IBM5 citations72
US7106110B2Sep 12, 2006
Clock dithering system and method during frequency scaling
IBM7 citations71
US5101372AMar 31, 1992
Optimum performance standard cell array multiplier
IBM8 citations71
US10884943B2Jan 5, 2021
Speculative checkin of ERAT cache entries
IBM0 citations62
US10599569B2Mar 24, 2020
Maintaining consistency between address translations in a data processing system
IBM1 citations62
US9727483B2Aug 8, 2017
Tracking memory accesses when invalidating effective address to real address translations
IBM1 citations51
US11221957B2Jan 11, 2022
Promotion of ERAT cache entries
IBM0 citations50