Inventor
JEN MICHELLE
US7 patents
Patents
7 patentsUS11232058B2Jan 25, 2022
Enabling sync header suppression latency optimization in the presence of retimers for serial interconnect
INTEL CORP18 citations91
US11669481B2Jun 6, 2023
Enabling sync header suppression latency optimization in the presence of retimers for serial interconnect
INTEL CORP11 citations83
US10747688B2Aug 18, 2020
Low latency retimer
INTEL CORP8 citations83
US12373279B2Jul 29, 2025
Selection of processing mode for receiver circuit
INTEL CORP0 citations61
US11163717B2Nov 2, 2021
Reduced pin count interface
INTEL CORP0 citations57
US10706003B2Jul 7, 2020
Reduced pin count interface
INTEL CORP0 citations46
US10198394B2Feb 5, 2019
Reduced pin count interface
INTEL CORP0 citations46