Inventor
ABRAHAM SETH
US23 patents
⚠️ This page may combine multiple inventors who share the name “ABRAHAM SETH”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
INTEL CORP
18 patentsUS6473897B1Oct 29, 2002
Method and apparatus for generating multiple processor-specific code segments in a single executable
INTEL CORP69 citations94
US6049668AApr 11, 2000
Method and apparatus for supporting multiple processor-specific code segments in a single executable
INTEL CORP71 citations92
US7367021B2Apr 29, 2008
Method and apparatus for generating multiple processor-specific code segments in a single executable
INTEL CORP24 citations91
US6633896B1Oct 14, 2003
Method and system for multiplying large numbers
INTEL CORP23 citations90
US9513917B2Dec 6, 2016
Vector friendly instruction format and execution thereof
INTEL CORP10 citations82
US9465680B1Oct 11, 2016
Method and apparatus for processor performance monitoring
INTEL CORP17 citations82
US10732970B2Aug 4, 2020
Processors, methods, systems, and instructions to generate sequences of integers in which integers in consecutive positions differ by a constant integer stride and where a smallest integer is offset from zero by an integer offset
INTEL CORP1 citations73
US10223112B2Mar 5, 2019
Processors, methods, systems, and instructions to generate sequences of integers in which integers in consecutive positions differ by a constant integer stride and where a smallest integer is offset from zero by an integer offset
INTEL CORP1 citations73
US10496522B2Dec 3, 2019
Virtualizing precise event based sampling
INTEL CORP2 citations71
US9965375B2May 8, 2018
Virtualizing precise event based sampling
INTEL CORP4 citations71
US11650820B2May 16, 2023
Processors, methods, systems, and instructions to generate sequences of integers in numerical order that differ by a constant stride
INTEL CORP0 citations62
US6026487AFeb 15, 2000
Computer program product and method for efficiently selecting one action from among alternative actions
INTEL CORP2 citations61
US12086594B2Sep 10, 2024
Vector friendly instruction format and execution thereof
INTEL CORP0 citations60
US11740904B2Aug 29, 2023
Vector friendly instruction format and execution thereof
INTEL CORP0 citations60
US11210096B2Dec 28, 2021
Vector friendly instruction format and execution thereof
INTEL CORP0 citations60
US11055203B2Jul 6, 2021
Virtualizing precise event based sampling
INTEL CORP0 citations60
US10223111B2Mar 5, 2019
Processors, methods, systems, and instructions to generate sequences of integers in which integers in consecutive positions differ by a constant integer stride and where a smallest integer is offset from zero by an integer offset
INTEL CORP0 citations52
US10795680B2Oct 6, 2020
Vector friendly instruction format and execution thereof
INTEL CORP0 citations50
ABRAHAM SETH
3 patentsUS9898283B2Feb 20, 2018
Processors, methods, systems, and instructions to generate sequences of integers in which integers in consecutive positions differ by a constant integer stride and where a smallest integer is offset from zero by an integer offset
ABRAHAM SETH2 citations71
US10565283B2Feb 18, 2020
Processors, methods, systems, and instructions to generate sequences of consecutive integers in numerical order
ABRAHAM SETH1 citations60
US9639354B2May 2, 2017
Packed data rearrangement control indexes precursors generation processors, methods, systems, and instructions
ABRAHAM SETH1 citations50
OULD AHMED VALL ELMOUSTAPHA
2 patentsUS9904547B2Feb 27, 2018
Packed data rearrangement control indexes generation processors, methods, systems and instructions
OULD AHMED VALL ELMOUSTAPHA2 citations73
US10866807B2Dec 15, 2020
Processors, methods, systems, and instructions to generate sequences of integers in numerical order that differ by a constant stride
OULD AHMED VALL ELMOUSTAPHA1 citations62