Inventor

PAIZ ROBERT

US17 patents

⚠️ This page may combine multiple inventors who share the name “PAIZ ROBERT”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

PAIZ ROBERT

ADVANCED MICRO DEVICES INC

High density trench fill due to new spacer fill method including isotropically etching silicon nitride spacers

Semiconductor device having dual gate dielectric thickness along the channel and fabrication thereof

Method and apparatus for in-situ cleaning of polysilicon-coated quartz furnaces

Semiconductor device fabrication using a sacrificial plug for defining a region for a gate electrode

Small gate electrode MOSFET

Method for in-situ cleaning of polysilicon-coated quartz furnaces

Method of making enhanced trench oxide with low temperature nitrogen integration

Method of manufacturing a semiconductor device by doping an active region after formation of a relatively thick oxide layer

Integrated circuit utilizing an air gap to reduce capacitance between adjacent metal linewidths

Integrated formation of LDD and non-LDD semiconductor devices

Method of making high performance MOSFET with integrated simultaneous formation of source/drain and gate regions

Method of integrating Ldd implantation for CMOS device fabrication

Multilevel transistor fabrication method having an inverted, upper level transistor

Chemical vapor deposition systems and methods for depositing films on semiconductor wafers

Semiconductor device having a thin gate oxide and method of manufacture thereof

ADVANCED MICRODEVICES INC

Method of manufacturing a semiconductor device using advanced contact formation

(unassigned)

Method and structure for channel length reduction in insulated gate field effect transistors