Inventor
HUA HONG L
US18 patents
⚠️ This page may combine multiple inventors who share the name “HUA HONG L”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
BELL JR ROBERT H
8 patentsUS8438334B2May 7, 2013
Hybrid storage subsystem with mixed placement of file contents
BELL JR ROBERT H30 citations92
US8943272B2Jan 27, 2015
Variable cache line size management
BELL JR ROBERT H5 citations84
US8769210B2Jul 1, 2014
Dynamic prioritization of cache access
BELL JR ROBERT H10 citations84
US8935478B2Jan 13, 2015
Variable cache line size management
BELL JR ROBERT H2 citations62
US9323527B2Apr 26, 2016
Performance of emerging applications in a virtualized environment using transient instruction streams
BELL JR ROBERT H0 citations52
US9298458B2Mar 29, 2016
Performance of emerging applications in a virtualized environment using transient instruction streams
BELL JR ROBERT H0 citations52
US8782346B2Jul 15, 2014
Dynamic prioritization of cache access
BELL JR ROBERT H0 citations52
US8751751B2Jun 10, 2014
Method and apparatus for minimizing cache conflict misses
BELL JR ROBERT H0 citations51
IBM
7 patentsUS7739422B2Jun 15, 2010
Method to improve system DMA mapping while substantially reducing memory fragmentation
IBM28 citations91
US6845504B2Jan 18, 2005
Method and system for managing lock contention in a computer system
IBM17 citations83
US8364796B2Jan 29, 2013
Changing ethernet MTU size on demand without shutting down the network adaptor
IBM5 citations82
US8959286B2Feb 17, 2015
Hybrid storage subsystem with mixed placement of file contents
IBM3 citations62
US9563559B2Feb 7, 2017
Dynamic prioritization of cache access
IBM0 citations52
US9727469B2Aug 8, 2017
Performance-driven cache line memory access
IBM0 citations51
US9626294B2Apr 18, 2017
Performance-driven cache line memory access
IBM1 citations51