Inventor

CHEN JIAN

US828 patents

⚠️ This page may combine multiple inventors who share the name “CHEN JIAN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

CHEN JIAN

SANDISK CORP

Systems for variable programming of non-volatile memory

Compensating for coupling during read operations of non-volatile memory

Compensating for coupling in non-volatile storage

Read operation for non-volatile storage that includes compensation for coupling

Selective operation of a multi-state non-volatile memory system in a binary mode

Behavior based programming of non-volatile memory

Error recovery for nonvolatile memory

Variable programming of non-volatile memory

Detecting over programmed memory

Techniques for reducing effects of coupling between storage elements of adjacent rows of memory cells

Source side self boosting technique for non-volatile memory

Error recovery for nonvolatile memory

Multi-state nonvolatile memory capable of reducing effects of coupling between storage elements

Techniques for reducing effects of coupling between storage elements of adjacent rows of memory cells

Operating techniques for reducing program and read disturbs of a non-volatile memory

Selective operation of a multi-state non-volatile memory system in a binary mode

Operating techniques for reducing effects of coupling between storage elements of a non-volatile memory operated in multiple data states

Selective operation of a multi-state non-volatile memory system in a binary mode

Multi-state non-volatile flash memory capable of being its own two state write cache

High density non-volatile flash memory without adverse effects of electric field coupling between adjacent floating gates

Trimming of analog voltages in flash memory devices

Method of reading NAND memory to compensate for coupling between storage elements

Compensating for coupling in non-volatile storage

Reverse coupling effect with timing information for non-volatile memory

Flash memory devices with trimmed analog voltages

Comprehensive erase verification for non-volatile memory

Operating techniques for reducing program and read disturbs of a non-volatile memory

Source side self boosting technique for non-volatile memory

Detecting over programmed memory after further programming

NANOSYS INC

Large-area nonenabled macroelectronic substrates and uses therefor

Large-area nanoenabled macroelectronic substrates and uses therefor

Highly luminescent nanostructures and methods of producing same

Large-area nanoenabled macroelectronic substrates and uses therefor

Large-area nanoenabled macroelectronic substrates and uses therefor

System and process for producing nanowire composites and electronic substrates therefrom

TOSHIBA KK

Operating techniques for reducing effects of coupling between storage elements of a non-volatile memory operated in multiple data states

Non-volatile semiconductor memory device adapted to store a multi-valued data in a single memory cell

Operating techniques for reducing effects of coupling between storage elements of a non-volatile memory operated in multiple data states

Non-volatile semiconductor memory with large erase blocks storing cycle counts

UNIV KENTUCKY RES FOUND

Method of solubilizing shortened single-walled carbon nanotubes in organic solutions

Solubilizing single-walled carbon nanotubes by direct reaction with amines and alkylaryl amines

APPLIED MATERIALS INC

Ceramic heater and esc with enhanced wafer edge performance

ADVANCED MICRO DEVICES INC

Sourceless floating gate memory device and method of storing data

SANDISK TECHNOLOGIES INC

Three-dimensional memory device containing CMOS devices over memory stack structures

SPROUSE STEVEN T

Flash memory with targeted read scrub algorithm

WHITEFORD JEFFERY A

Compositions and methods for modulation of nanostructure energy levels

UNIV PITTSBURGH

Polymer and method for using the polymer for noncovalently functionalizing nanotubes

FREESCALE SEMICONDUCTOR INC

Semiconductor fabrication process using transistor spacers of differing widths

(unassigned)

Read and erase verify methods and circuits suitable for low voltage non-volatile memories

ZYVEX CORP

System and method for manipulating nanotubes