Inventor

FENG WU-SHIUNG

TW17 patents

⚠️ This page may combine multiple inventors who share the name “FENG WU-SHIUNG”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

FENG WU-SHIUNG

UNIV CHANG GUNG

Method and apparatus for rapidly selecting types of buffers which are inserted into the clock tree for high-speed very-large-scale-integration

Clock tree synthesis for low power consumption and low clock skew

Method on scan chain reordering for lowering VLSI power consumption

Method of moment computations in R(L)C interconnects of high speed VLSI with resistor loops

Method of designing a synchronous circuit of VLSI for clock skew scheduling and optimization

Efficient digital filter design tool for approximating an FIR filter with a low-order linear-phase IIR filter

Method and apparatus for model-order reduction and sensitivity analysis

Method of estimating crosstalk noise in lumped RLC coupled interconnects

Method of verification of estimating crosstalk noise in coupled RLC interconnects with distributed line in nanometer integrated circuits

Biomedical signal instrumentation amplifier

Method of estimating the signal delay in a VLSI circuit

Method of searching paths suffering from the electrostatic discharge in the process of an integrated circuit design

Generalizations of adjoint networks techniques for RLC interconnects model-order reductions

Multi-point model reductions of VLSI interconnects using the rational Arnoldi method with adaptive orders

Method of determining high-speed VLSI reduced-order interconnect by non-symmetric lanczos algorithm

Interconnect model-order reduction method

HUA MU-YI

Chemically-modified graphene and method for producing the same