Inventor

MIKOLAJICK THOMAS

DE29 patents

⚠️ This page may combine multiple inventors who share the name “MIKOLAJICK THOMAS”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

MIKOLAJICK THOMAS

INFINEON TECHNOLOGIES AG

Charge trapping memory cell and fabrication method

Charge-trapping memory device including high permittivity strips

Semiconductor memory cell and semiconductor memory device

Semiconductor memory having charge trapping memory cells and fabrication method thereof

Method for fabricating a memory cell

Charge-trapping memory device and method of production

Multi-bit virtual-ground NAND memory device

Charge trapping memory cell, method for fabricating it, and semiconductor memory device

Floating gate memory cell, method for fabricating it, and semiconductor memory device

Memory element for a semiconductor memory device

Method for fabricating a semiconductor memory device

Method for fabricating a semiconductor memory device

Charge-trapping memory device and methods for operating and manufacturing the cell

Method for fabricating a semiconductor memory cell

Non-volatile semiconductor memory device

Method for forming a semiconductor product and semiconductor product

Semiconductor circuit configuration and semiconductor memory device

Semiconductor memory cell and semiconductor memory device

Semiconductor memory having charge trapping memory cells and fabrication method thereof

Integrated semiconductor memory configuration

Memory cell arrays and methods for producing memory cell arrays

Method for producing ferroelectric capacitors and integrated semiconductor memory chips

FeRAM memory and method for manufacturing it

Method for fabricating a semiconductor memory device

Method for producing an integrated semiconductor memory configuration

QIMONDA AG

Integrated circuits and methods of manufacturing thereof

Memory cell arrangements

Evaluation circuit and evaluation method for the assessment of memory cell states

Measuring circuit and reading method for memory cells