Inventor

LEI CHEOK-KEI

CN20 patents

⚠️ This page may combine multiple inventors who share the name “LEI CHEOK-KEI”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

LEI CHEOK-KEI

TAIWAN SEMICONDUCTOR MFG CO LTD

Metal cut optimization for standard cells

Performance-driven and gradient-aware dummy insertion for gradient-sensitive array

Capacitive isolation structure insert for reversed signals

Multiplexer

Metal cut optimization for standard cells

Multiplexer

Metal cut optimization for standard cells

Capacitive isolation structure insert for reversed signals

Metal cut optimization for standard cells

Multiplexer

Capacitive isolation structure insert for reversed signals

Layout for integrated circuit and the integrated circuit

Layout for integrated circuit and the integrated circuit

Layout for integrated circuit and the integrated circuit

Layout method for integrated circuit and layout of the integrated circuit

Performance-driven and gradient-aware dummy insertion for gradient-sensitive array

TAIWAN SEMICONDUCTOR MFG

System and methods for converting planar design to FinFET design

LIN YI-TANG

System and methods for converting planar design to FinFET design

LEI CHEOK-KEI

System and methods for converting planar design to FinFET design

CHEN HSIAO-HUI

Automatic flow of megacell generation