Inventor

PATIL NISHANT

US19 patents

⚠️ This page may combine multiple inventors who share the name “PATIL NISHANT”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

PATIL NISHANT

GOOGLE LLC

Optimized matrix multiplication using vector multiplication of interleaved matrix values

Bandwidth allocation in asymmetrical switch topologies

Modifying machine learning models to improve locality

Reconfigurable computing pods using optical networks

Reconfigurable computing pods using optical networks

Asymmetric data communication for host-device interface

Modifying machine learning models to improve locality

Asymmetric data communication for host-device interface

Managing processing system efficiency

Managing processing system efficiency

Reconfigurable computing pods using optical networks

Bandwidth allocation in asymmetrical switch topologies

GOOGLE INC

Optimized matrix multiplication using vector multiplication of interleaved matrix values

Optimized matrix multiplication using vector multiplication of interleaved matrix values

SK HYNIX MEMORY SOLUTIONS INC

Multi-level logical block address (LBA) mapping table for solid state

LINK—A—MEDIA DEVICES CORP

Write processing for unchanged data with new metadata

PATIL NISHANT

System and method for analyzing a nanotube logic circuit

DEEPMIND TECH LTD

Rate control machine learning models with feedback control for video encoding

UNIV LELAND STANFORD JUNIOR

Nanotube logic circuits