Inventor
HOEROLD STEPHAN
US5 patents
Patents
5 patentsUS7565638B2Jul 21, 2009
Density-based layer filler for integrated circuit design
SUN MICROSYSTEMS INC44 citations90
US6665845B1Dec 16, 2003
System and method for topology based noise estimation of submicron integrated circuit designs
SUN MICROSYSTEMS INC97 citations90
US6941532B2Sep 6, 2005
Clock skew verification methodology for grid-based design
SUN MICROSYSTEMS INC20 citations86
US7404161B2Jul 22, 2008
Fullchip functional equivalency and physical verification
SUN MICROSYSTEMS INC12 citations80
US7340710B1Mar 4, 2008
Integrated circuit binning and layout design system
SUN MICROSYSTEMS INC12 citations80