Inventor

CHAMBERLAIN JEFFREY D

US24 patents

⚠️ This page may combine multiple inventors who share the name “CHAMBERLAIN JEFFREY D”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

CHAMBERLAIN JEFFREY D

INTEL CORP

Function as a service (FaaS) system enhancements

Two level memory full line writes

Inclusive and non-inclusive tracking of local cache lines to avoid near memory reads on cache line memory writes into a two level system memory

Multiple dies hardware processors and methods

Cache allocation with code and data prioritization

Cache allocation with code and data prioritization

Method and apparatus for processing a predicated instruction using limited predicate slip

Multiple dies hardware processors and methods

Method, apparatus and system for modular on-die coherent interconnect for packetized communication

Virtual retry queue

Multiple dies hardware processors and methods

Multiple dies hardware processors and methods

Optimized caching agent with integrated directory cache

Cache line demote infrastructure for multi-processor pipelines

System and method for per-agent control and quality of service of shared resources in chip multiprocessor platforms

Two level memory full line writes

Method, apparatus and system for optimizing cache memory transaction handling in a processor

Systems, apparatuses, and methods for resource bandwidth enforcement

Multiple-queue multiple-resource entry sleep and wakeup for power savings and bandwidth conservation in a retry based pipeline

Link affinitization to reduce transfer latency

Cache coherency apparatus and method minimizing memory writeback operations

VASH JAMES R

Multiple-queue multiple-resource entry sleep and wakeup for power savings and bandwidth conservation in a retry based pipeline

LIU YEN CHENG

Scalably mechanism to implement an instruction that monitors for writes to an address

GEETHA VEDARAMAN

Value of forward state by increasing local caching agent forwarding