Inventor
NALLUSAMY ESWARAMOORTHI
US15 patents
⚠️ This page may combine multiple inventors who share the name “NALLUSAMY ESWARAMOORTHI”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
INTEL CORP
14 patentsUS9535606B2Jan 3, 2017
Virtual serial presence detect for pooled memory
INTEL CORP12 citations83
US10761938B2Sep 1, 2020
System and method for granular reset management without reboot
INTEL CORP6 citations82
US9798641B2Oct 24, 2017
Method to increase cloud availability and silicon isolation using secure enclaves
INTEL CORP4 citations73
US10019354B2Jul 10, 2018
Apparatus and method for fast cache flushing including determining whether data is to be stored in nonvolatile memory
INTEL CORP2 citations72
US12045135B2Jul 23, 2024
System and method for granular reset management without reboot
INTEL CORP0 citations60
US11803643B2Oct 31, 2023
Boot code load system
INTEL CORP0 citations60
US11645159B2May 9, 2023
System and method for granular reset management without reboot
INTEL CORP0 citations60
US11157064B2Oct 26, 2021
Techniques to dynamically enable and disable accelerator devices in compute environments
INTEL CORP0 citations51
US10990534B2Apr 27, 2021
Device, system and method to facilitate disaster recovery for a multi-processor platform
INTEL CORP0 citations51
US11294749B2Apr 5, 2022
Techniques to collect crash data for a computing system
INTEL CORP0 citations50
US12271760B2Apr 8, 2025
Cluster identifier remapping for asymmetric topologies
INTEL CORP0 citations47
US11966330B2Apr 23, 2024
Link affinitization to reduce transfer latency
INTEL CORP0 citations44
US12411689B2Sep 9, 2025
Method to reduce register access latency in split-die SoC designs
INTEL CORP0 citations42
US10528398B2Jan 7, 2020
Operating system visibility into system states that cause delays and technology to achieve deterministic latency
INTEL CORP0 citations35