Inventor
ATSATT SEAN R
US60 patents
⚠️ This page may combine multiple inventors who share the name “ATSATT SEAN R”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
INTEL CORP
23 patentsUS10187064B1Jan 22, 2019
Systems and methods for routing data across regions of an integrated circuit
INTEL CORP12 citations84
US10223014B1Mar 5, 2019
Maintaining reconfigurable partitions in a programmable device
INTEL CORP8 citations81
US11080449B2Aug 3, 2021
Modular periphery tile for integrated circuit device
INTEL CORP2 citations73
US10642946B2May 5, 2020
Modular periphery tile for integrated circuit device
INTEL CORP3 citations73
US10248484B2Apr 2, 2019
Prioritized error-detection and scheduling
INTEL CORP2 citations73
US12164462B2Dec 10, 2024
Micro-network-on-chip and microsector infrastructure
INTEL CORP2 citations72
US11632112B2Apr 18, 2023
Integrated circuit device with separate die for programmable fabric and programmable fabric support circuitry
INTEL CORP2 citations72
US12248021B2Mar 11, 2025
Debug trace microsectors
INTEL CORP1 citations64
US12265772B2Apr 1, 2025
Integrated circuit with peek and poke protection circuitry for multi-tenant usage model
INTEL CORP0 citations62
US12153866B2Nov 26, 2024
Modular periphery tile for integrated circuit device
INTEL CORP0 citations62
US12063037B2Aug 13, 2024
Embedded network on chip accessible to programmable logic fabric of programmable logic device in multi-dimensional die systems
INTEL CORP0 citations62
US11960734B2Apr 16, 2024
Logic fabric based on microsector infrastructure with data register having scan registers
INTEL CORP0 citations62
US11714941B2Aug 1, 2023
Modular periphery tile for integrated circuit device
INTEL CORP0 citations62
US11520388B2Dec 6, 2022
Systems and methods for integrating power and thermal management in an integrated circuit
INTEL CORP0 citations62
US11379645B2Jul 5, 2022
Integrated circuit with peek and poke protection circuitry for a multi-tenant usage model
INTEL CORP0 citations62
US11296706B2Apr 5, 2022
Embedded network on chip accessible to programmable logic fabric of programmable logic device in multi-dimensional die systems
INTEL CORP0 citations62
US11257526B2Feb 22, 2022
Sector-aligned memory accessible to programmable logic fabric of programmable logic device
INTEL CORP0 citations62
US11115026B2Sep 7, 2021
Systems and methods for routing data across regions of an integrated circuit
INTEL CORP0 citations62
US12237831B2Feb 25, 2025
Network-on-chip (NOC) with flexible data width
INTEL CORP0 citations61
US12057836B2Aug 6, 2024
Logic fabric based on microsector infrastructure
INTEL CORP1 citations61
US11700002B2Jul 11, 2023
Network-on-chip (NOC) with flexible data width
INTEL CORP0 citations61
US11342918B2May 24, 2022
Network-on-chip (NOC) with flexible data width
INTEL CORP0 citations61
US11562101B2Jan 24, 2023
On-device bitstream validation
INTEL CORP1 citations60
ALTERA CORP
13 patentsUS9600291B1Mar 21, 2017
Secure boot using a field programmable gate array (FPGA)
ALTERA CORP23 citations94
US9584130B1Feb 28, 2017
Partial reconfiguration control interface for integrated circuits
ALTERA CORP25 citations94
US7627784B1Dec 1, 2009
Modular processor debug core connection for programmable chip systems
ALTERA CORP52 citations93
US9729518B1Aug 8, 2017
Method and apparatus for secure provisioning of an integrated circuit device
ALTERA CORP7 citations84
US9553762B1Jan 24, 2017
Network-on-chip with fixed and configurable functions
ALTERA CORP11 citations84
US9170911B1Oct 27, 2015
Protocol error monitoring on an interface between hard logic and soft logic
ALTERA CORP17 citations77
US10523207B2Dec 31, 2019
Programmable circuit having multiple sectors
ALTERA CORP6 citations73
US10446202B1Oct 15, 2019
Increasing error rate detection through distribution of read current load
ALTERA CORP5 citations73
US10270447B2Apr 23, 2019
Apparatus for configurable interface and associated methods
ALTERA CORP2 citations72
US9893727B1Feb 13, 2018
Apparatus for configurable interface and associated methods
ALTERA CORP3 citations72
US9355198B1May 31, 2016
Method and apparatus for performing late binding of control status registers in a design compilation flow
ALTERA CORP2 citations63
US8661379B1Feb 25, 2014
Techniques and apparatus to validate an integrated circuit design
ALTERA CORP2 citations63
US10367745B1Jul 30, 2019
Network-on-chip with fixed and configurable functions
ALTERA CORP1 citations62
SEAGATE TECHNOLOGY
5 patentsUS5784390AJul 21, 1998
Fast AtA-compatible drive interface with error detection and/or error correction
SEAGATE TECHNOLOGY74 citations95
US5818654AOct 6, 1998
Apparatus and process for managing defective headerless sectors
SEAGATE TECHNOLOGY125 citations94
US5745793AApr 28, 1998
Apparatus having a circular buffer that maintains a one entry gap between elements written to the microprocessor and elements operated on by the clock
SEAGATE TECHNOLOGY78 citations94
US5983309ANov 9, 1999
Autonomous high speed address translation with defect management for hard disc drives
SEAGATE TECHNOLOGY64 citations89
US5715418AFeb 3, 1998
Autonomous high speed linear space address mode translation for use with a computer hard disc system
SEAGATE TECHNOLOGY28 citations86
ATSATT SEAN R
5 patentsUS8680886B1Mar 25, 2014
Apparatus for configurable electronic circuitry and associated methods
ATSATT SEAN R15 citations92
US8166237B1Apr 24, 2012
Configurable allocation of thread queue resources in an FPGA
ATSATT SEAN R31 citations92
US8407643B1Mar 26, 2013
Techniques and apparatus to validate an integrated circuit design
ATSATT SEAN R7 citations84
US9537488B1Jan 3, 2017
Apparatus for configurable interface and associated methods
ATSATT SEAN R4 citations83
US8467218B1Jun 18, 2013
System and apparatus with IC resource interconnect
ATSATT SEAN R18 citations83
ESS TECHNOLOGY INC
1 patentSEAGATE TECHNOLOGY LLC
1 patent(unassigned)
1 patentINTEL CORPRORATION
1 patentShowing the top 50 of 60 patents by PatentIndex Score.