Inventor
CHOI STEVE
US21 patents
⚠️ This page may combine multiple inventors who share the name “CHOI STEVE”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
SILICON STORAGE TECH INC
7 patentsUS7567458B2Jul 28, 2009
Flash memory array having control/decode circuitry for disabling top gates of defective memory cells
SILICON STORAGE TECH INC10 citations92
US7447073B2Nov 4, 2008
Method for handling a defective top gate of a source-side injection flash memory array
SILICON STORAGE TECH INC9 citations92
US7663921B2Feb 16, 2010
Flash memory array with a top gate line dynamically coupled to a word line
SILICON STORAGE TECH INC5 citations73
US7626863B2Dec 1, 2009
Flash memory array system including a top gate memory cell
SILICON STORAGE TECH INC5 citations73
US7848140B2Dec 7, 2010
Flash memory array system including a top gate memory cell
SILICON STORAGE TECH INC2 citations62
US7778080B2Aug 17, 2010
Flash memory array system including a top gate memory cell
SILICON STORAGE TECH INC2 citations62
US6972994B2Dec 6, 2005
Circuit and a method to screen for defects in an addressable line in a non-volatile memory
SILICON STORAGE TECH INC0 citations51
SANDISK TECHNOLOGIES INC
4 patentsUS9154027B2Oct 6, 2015
Dynamic load matching charge pump for reduced current consumption
SANDISK TECHNOLOGIES INC19 citations84
US9653126B2May 16, 2017
Digital ramp rate control for charge pumps
SANDISK TECHNOLOGIES INC10 citations83
US9368224B2Jun 14, 2016
Self-adjusting regulation current for memory array source line
SANDISK TECHNOLOGIES INC7 citations83
US9514831B2Dec 6, 2016
Multi-clock generation through phase locked loop (PLL) reference
SANDISK TECHNOLOGIES INC1 citations51