Inventor
GITLIN DANIEL
US18 patents
⚠️ This page may combine multiple inventors who share the name “GITLIN DANIEL”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
XILINX INC
17 patentsUS6621325B2Sep 16, 2003
Structures and methods for selectively applying a well bias to portions of a programmable device
XILINX INC90 citations98
US6266269B1Jul 24, 2001
Three terminal non-volatile memory element
XILINX INC113 citations98
US5880620AMar 9, 1999
Pass gate circuit with body bias control
XILINX INC253 citations98
US7032194B1Apr 18, 2006
Layout correction algorithms for removing stress and other physical effect induced process deviation
XILINX INC87 citations96
US6268639B1Jul 31, 2001
Electrostatic-discharge protection circuit
XILINX INC64 citations96
US7294888B1Nov 13, 2007
CMOS-compatible non-volatile memory cell with lateral inter-poly programming layer
XILINX INC21 citations92
US6645802B1Nov 11, 2003
Method of forming a zener diode
XILINX INC20 citations92
US6549458B1Apr 15, 2003
Non-volatile memory array using gate breakdown structures
XILINX INC25 citations92
US6522582B1Feb 18, 2003
Non-volatile memory array using gate breakdown structures
XILINX INC20 citations92
US5870327AFeb 9, 1999
Mixed mode RAM/ROM cell using antifuses
XILINX INC25 citations91
US7936006B1May 3, 2011
Semiconductor device with backfilled isolation
XILINX INC8 citations84
US6740936B1May 25, 2004
Ballast resistor with reduced area for ESD protection
XILINX INC12 citations73
US7772093B2Aug 10, 2010
Method of and circuit for protecting a transistor formed on a die
XILINX INC2 citations62
US7687797B1Mar 30, 2010
Three-terminal non-volatile memory element with hybrid gate dielectric
XILINX INC3 citations62
US7688639B1Mar 30, 2010
CMOS-compatible non-volatile memory cell with lateral inter-poly programming layer
XILINX INC0 citations52
US7956385B1Jun 7, 2011
Circuit for protecting a transistor during the manufacture of an integrated circuit device
XILINX INC0 citations51
US7839693B1Nov 23, 2010
Method of fabricating CMOS-compatible non-volatile memory cell with lateral inter-poly programming layer
XILINX INC0 citations49