Inventor
STENZ GUENTER
US21 patents
⚠️ This page may combine multiple inventors who share the name “STENZ GUENTER”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
XILINX INC
19 patentsUS6789244B1Sep 7, 2004
Placement of clock objects under constraints
XILINX INC178 citations98
US7143380B1Nov 28, 2006
Method for application of network flow techniques under constraints
XILINX INC97 citations97
US6857115B1Feb 15, 2005
Placement of objects with partial shape restriction
XILINX INC15 citations84
US7958480B1Jun 7, 2011
Placement of I/O blocks within I/O banks using an integer linear programming formulation
XILINX INC14 citations83
US7072815B1Jul 4, 2006
Relocation of components for post-placement optimization
XILINX INC14 citations83
US6754878B1Jun 22, 2004
Recognizing structure information from a netlist
XILINX INC13 citations82
US7313778B1Dec 25, 2007
Method system and apparatus for floorplanning programmable logic designs
XILINX INC8 citations73
US7149993B1Dec 12, 2006
Method, system, and apparatus for incremental design in programmable logic devices using floorplanning
XILINX INC7 citations73
US6983439B1Jan 3, 2006
Unified placer infrastructure
XILINX INC5 citations72
US9881112B1Jan 30, 2018
Vectorless dynamic power estimation for sequential circuits
XILINX INC2 citations71
US10891413B1Jan 12, 2021
Incremental initialization by parent and child placer processes in processing a circuit design
XILINX INC5 citations69
US11003827B1May 11, 2021
Multiprocessing flow and massively multi-threaded flow for multi-die devices
XILINX INC3 citations66
US11875100B1Jan 16, 2024
Distributed parallel processing routing
XILINX INC2 citations65
US10416232B1Sep 17, 2019
Timing optimizations in circuit designs using opposite clock edge triggered flip-flops
XILINX INC1 citations62
US7512922B1Mar 31, 2009
Methods of structured placement of a circuit design
XILINX INC6 citations62
US7392499B1Jun 24, 2008
Placement of input/output blocks of an electronic design in an integrated circuit
XILINX INC4 citations62
US6957406B1Oct 18, 2005
Analytical placement methods with minimum preplaced components
XILINX INC5 citations62
US8010924B1Aug 30, 2011
Assignment of select input/output blocks to banks for integrated circuits using integer linear programming with proximity optimization
XILINX INC5 citations61
US11106851B1Aug 31, 2021
Serialization in electronic design automation flows
XILINX INC0 citations59