Inventor

CHANG CHAO-HUNG

TW41 patents

⚠️ This page may combine multiple inventors who share the name “CHANG CHAO-HUNG”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

CHANG CHAO-HUNG

GSI TECHNOLOGY INC

Processing array device that performs one cycle full adder operation and bit line read/write logic features

Read data processing circuits and methods associated memory cells

Read and write data processing circuits and methods associated with computational memory cells that provides write inhibits and read bit line pre-charge inhibits

Computational memory cell and processing array device using memory cells

Systems and method involving fast-acquisition lock features associated with phase locked loop circuitry

Systems and methods involving fast-acquisition lock features associated with phase locked loop circuitry

Systems and methods of phase frequency detection with clock edge overriding reset, extending detection range, improvement of cycle slipping and/or other features

Ultra low VDD memory cell with ratioless write port

Computational memory cell and processing array device with ratioless write port

Computational memory cell and processing array device using memory cells

Processing array device that performs one cycle full adder operation and bit line read/write logic features

Results processing circuits and methods associated with computational memory cells

Write data processing circuits and methods associated with computational memory cells

Read and write data processing circuits and methods associated with computational memory cells using two read multiplexers

Write data processing circuits and methods associated with computational memory cells

Read data processing circuits and methods associated with computational memory cells

Computational memory cell and processing array device using memory cells

Computational memory cell and processing array device using memory cells

Write data processing methods associated with computational memory cells

Processing array device that performs one cycle full adder operation and bit line read/write logic features

Results processing circuits and methods associated with computational memory cells

AVER INFORMATION INC

Intelligent charging device and charge scheduling control method thereof

Detachable camera and operation method thereof

Charging method and charging system

Automatic tracking method and tracking system applied to pan-tilt-zoom camera device

Operation judgment method for interactive touch system

Charging cabinet and control method thereof

Pairing and interconnecting method between electronic devices

Charging control system and short-circuit current protecting method thereof

Intelligent charging system and intelligent charging method

Charging device and method for commonly charging multiple digital electronic devices

Charging control system and power charging management method thereof

CHANG CHAO-HUNG

Generating method for transaction models with indicators for option

Mechanism for rotatable image-taking device

GSI TECHONOLOGY INC

Systems and methods of phase frequency detection with clock edge overriding reset, extending detection range, improvement of cycle slipping and/or other features

AVERMEDIA INFORMATION INC

Document camera with size-estimating function and size estimation method

SUNVISION SCIENT INC

Object detection system and method

YUH PERNG-FEI

Fast and accurate current driver with zero standby current and features for boost and temperature compensation for MRAM write circuit

SUNAGA TOSHIO

Reference cell architectures for small memory array block activation

IND TECH RES INST

Debugging method

INTEGRATED SILICON SOLUTION

Smart five volt generator operable from different power supply voltages