P

Inventor

SUN YI SHENG ANTHONY

SG14 patents
⚠️ This page may combine multiple inventors who share the name “SUN YI SHENG ANTHONY”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

UNITED TEST & ASSEMBLY CT LT

3 patents
US9142487B2Sep 22, 2015

Packaging structural member

UNITED TEST & ASSEMBLY CT LT44 citations96
US8384203B2Feb 26, 2013

Packaging structural member

UNITED TEST & ASSEMBLY CT LT50 citations96
US8741762B2Jun 3, 2014

Through silicon via dies and packages

UNITED TEST & ASSEMBLY CT LT3 citations62

MAXIM INTEGRATED PRODUCTS

3 patents
US9583425B2Feb 28, 2017

Solder fatigue arrest for wafer level package

MAXIM INTEGRATED PRODUCTS6 citations69
US11380558B2Jul 5, 2022

Optical sensor packaging system

MAXIM INTEGRATED PRODUCTS0 citations60
US10727086B2Jul 28, 2020

Optical sensor packaging system

MAXIM INTEGRATED PRODUCTS1 citations60

TOH CHIN HOCK

2 patents
US8647924B2Feb 11, 2014

Semiconductor package and method of packaging semiconductor devices

TOH CHIN HOCK8 citations74
US8772921B2Jul 8, 2014

Interposer for semiconductor package

TOH CHIN HOCK2 citations59

UTAC HEADQUARTERS PTE LTD

1 patent
US9704726B2Jul 11, 2017

Packaging structural member

UTAC HEADQUARTERS PTE LTD35 citations93

UNITED TEST & ASSEMBLY CT LTD

1 patent
US7339278B2Mar 4, 2008

Cavity chip package

UNITED TEST & ASSEMBLY CT LTD21 citations87

LIU HAO

1 patent
US8586465B2Nov 19, 2013

Through silicon via dies and packages

LIU HAO7 citations83

BERGEMONT ALBERT

1 patent
US8686543B2Apr 1, 2014

3D chip package with shielded structures

BERGEMONT ALBERT7 citations75

UTAC UNITED TEST AND ASSEMBLY TEST CT LTD

1 patent
US7851899B2Dec 14, 2010

Multi-chip ball grid array package and method of manufacture

UTAC UNITED TEST AND ASSEMBLY TEST CT LTD10 citations74

SAMOILOV ARKADII V

1 patent
US9343430B2May 17, 2016

Stacked wafer-level package device

SAMOILOV ARKADII V0 citations40