Inventor

ONUFRYK PETER Z

US37 patents

⚠️ This page may combine multiple inventors who share the name “ONUFRYK PETER Z”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

ONUFRYK PETER Z

PMC SIERRA US INC

Method and apparatus for translated routing in an interconnect switch

System and method with reference voltage partitioning for low density parity check decoding

Method and apparatus for mapped I/O routing in an interconnect switch

Apparatus and method for adjusting a correctable raw bit error rate limit in a memory system using strong log-likelihood (LLR) values

Apparatus and method based on LDPC codes for adjusting a correctable raw bit error rate limit in a memory system

Layer specific attenuation factor LDPC decoder

Flexible routing engine for a PCI express switch and method of use

AT & T CORP

Method and apparatus for communication services on a network

Method and apparatus for the encapsulation of control information in a real-time data stream

Packet telephony appliance

Packet telephony appliance

Method and apparatus for unifield control and data event exchange in a software system

Method and system for telephony and high speed data access on a broadband access network

ONUFRYK PETER Z

Interrupt technique for a nonvolatile memory controller

PCI express switch and method for multi-port non-transparent switching

Nonvolatile memory controller with host controller interface for retrieving and dispatching nonvolatile memory commands in a distributed manner

System and method for generating parity data in a nonvolatile memory controller by using a distributed processing technique

System and method for routing a data message through a message network

INTEGRATED DEVICE TECH

Interrupt coalescer for DMA channel

Expansion of cross-domain addressing for PCI-express packets passing through non-transparent bridge

Memory unit with controller managing memory access through JTAG and CPU interfaces

Reset circuit for resetting two clock domains

Apparatus and method for limiting data transmission rates

MICHELONI RINO

Nonvolatile memory controller with concatenated error correction codes

Nonvolatile memory controller with error detection for concatenated error correction codes

Nonvolatile memory controller with two-stage error correction technique for enhanced reliability

Shuffler error correction code system and method

MICROSEMI STORAGE SOLUTIONS (US) INC

System and method for higher quality log likelihood ratios in LDPC decoding

System and method for accumulating soft information in LDPC decoding

Memory controller and integrated circuit device for correcting errors in data read from memory cells

MICROSEMI STORAGE SOLUTIONS US INC

System and method for lifetime specific LDPC decoding

MICROSEMI SOLUTIONS U S INC

Method and apparatus for layer-specific LDPC decoding

MICROSEMI SOLUTIONS (U S ) INC

Layer specific LDPC decoder

INTERGRATED DEVICE TECHNOLOGY

Method and apparatus for generating a random bit stream in true random number generator fashion

NORRIE CHRISTOPHER I W

BCH data correction system and method

BELLOVIN STEVEN MICHAEL

Method and system for telephony and high-speed data access on a broadband access network

CHAN MIKE

Packet telephony appliance