Inventor

KUMASHIKAR MAHESH K

IN19 patents

⚠️ This page may combine multiple inventors who share the name “KUMASHIKAR MAHESH K”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

KUMASHIKAR MAHESH K

INTEL CORP

Multiple dies hardware processors and methods

Selective use of different advanced interface bus with electronic chips

Multiple dies hardware processors and methods

Systems and methods for dynamic power and thermal management for programmable logic devices

Controlled transition between configuration mode and user mode to reduce current-resistance voltage drop

Switch based on load current

Workload-dependent integrated circuit operation based on power headroom

Dynamic loadlines for programmable fabric devices

Systems and methods to reduce voltage guardband

Multiple dies hardware processors and methods

Multiple dies hardware processors and methods

Segmented row repair for programmable logic devices

Dynamically scalable timing and power models for programmable logic devices

Early wake-warn for clock gating control

Self-gating flops for dynamic power reduction

Power management using voltage islands on programmable logic devices

Reticle stitching to achieve high-capacity integrated circuit

ALTERA CORP

Homogenous die stacking with increased element density

KUMASHIKAR MAHESH K

Power reduction using unmodified information in evicted cache lines