P

Inventor

MORENO JAIME H

US16 patents
⚠️ This page may combine multiple inventors who share the name “MORENO JAIME H”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

IBM

13 patents
US6678795B1Jan 13, 2004

Method and apparatus for memory prefetching based on intra-page usage history

IBM105 citations97
US5625835AApr 29, 1997

Method and apparatus for reordering memory operations in a superscalar or very long instruction word processor

IBM122 citations96
US7133971B2Nov 7, 2006

Cache with selective least frequently used or most frequently used cache line replacement

IBM21 citations92
US6948051B2Sep 20, 2005

Method and apparatus for reducing logic activity in a microprocessor using reduced bit width slices that are enabled or disabled depending on operation width

IBM40 citations92
US6711651B1Mar 23, 2004

Method and apparatus for history-based movement of shared-data in coherent cache memories of a multiprocessor system using push prefetching

IBM39 citations92
US10049061B2Aug 14, 2018

Active memory device gather, scatter, and filter

IBM3 citations73
US7958311B2Jun 7, 2011

Cache line replacement techniques allowing choice of LFU or MFU cache line replacement

IBM4 citations73
US7051186B2May 23, 2006

Selective bypassing of a multi-port register file

IBM9 citations73
US7130963B2Oct 31, 2006

System and method for instruction memory storage and processing based on backwards branch control information

IBM5 citations63
US6704855B1Mar 9, 2004

Method and apparatus for reducing encoding needs and ports to shared resources in a processor

IBM3 citations62
US7870341B2Jan 11, 2011

Cache line replacement techniques allowing choice of LFU or MFU cache line replacement

IBM0 citations51
US7398357B1Jul 8, 2008

Cache line replacement techniques allowing choice of LFU or MFU cache line replacement

IBM0 citations51
US9064030B2Jun 23, 2015

Tree traversal in a memory device

IBM0 citations41

FLEISCHER BRUCE M

3 patents