Inventor

PRENER DANIEL A

US17 patents

⚠️ This page may combine multiple inventors who share the name “PRENER DANIEL A”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

PRENER DANIEL A

IBM

Branch history guided instruction/data prefetching

Prefetching using future branch path information derived from branch prediction

Method and apparatus for reducing latency in set-associative caches using set prediction

Method and apparatus for providing multiple condition code fields to to allow pipelined instructions contention free access to separate condition codes

Method and system for interrupt handling in a multi-processor computer system executing speculative instruction threads

Partitioning programs between a general purpose core and one or more accelerators

Extending the number of instruction bits in processors with fixed length instructions, in a manner compatible with existing code

Flexible optimized data handling in systems with multiple memories

Flexible optimized data handling in systems with multiple memories

Method and apparatus to extend the number of instruction bits in processors with fixed length instructions, in a manner compatible with existing code

Exposed-pipeline processing element with rollback

FLEISCHER BRUCE M

Gather/scatter of multiple data elements with packed loading/storing into/from a register file entry

Gather/scatter of multiple data elements with packed loading/storing into /from a register file entry

Vector processing in an active memory device

Vector processing in an active memory device

BOSE PRADIP

Hardware execution driven application level derating calculation for soft error rate analysis

O'BRIEN JOHN KEVIN PATRICK

Method for partitioning programs between a general purpose core and one or more accelerators