P

Inventor

LEE CHWAN-YING

TW37 patents
⚠️ This page may combine multiple inventors who share the name “LEE CHWAN-YING”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

IND TECH RES INST

18 patents
US6436816B1Aug 20, 2002

Method of electroless plating copper on nitride barrier

IND TECH RES INST347 citations99
US6180523B1Jan 30, 2001

Copper metallization of USLI by electroless process

IND TECH RES INST357 citations99
US6030877AFeb 29, 2000

Electroless gold plating method for forming inductor structures

IND TECH RES INST210 citations99
US5801100ASep 1, 1998

Electroless copper plating method for forming integrated circuit structures

IND TECH RES INST99 citations98
US5917244AJun 29, 1999

Integrated circuit inductor structure formed employing copper containing conductor winding layer clad with nickel containing conductor layer

IND TECH RES INST72 citations96
US5776813AJul 7, 1998

Process to manufacture a vertical gate-enhanced bipolar transistor

IND TECH RES INST85 citations96
US6713377B2Mar 30, 2004

Method of electroless plating copper on nitride barrier

IND TECH RES INST21 citations92
US6406743B1Jun 18, 2002

Nickel-silicide formation by electroless Ni deposition on polysilicon

IND TECH RES INST35 citations92
US6180478B1Jan 30, 2001

Fabrication process for a single polysilicon layer, bipolar junction transistor featuring reduced junction capacitance

IND TECH RES INST32 citations92
US8841721B2Sep 23, 2014

Stepped trench MOSFET and method of fabricating the same

IND TECH RES INST16 citations84
US6589849B1Jul 8, 2003

Method for fabricating epitaxy base bipolar transistor

IND TECH RES INST15 citations84
US8766279B1Jul 1, 2014

SiC-based trench-type schottky device

IND TECH RES INST15 citations82
US6660625B2Dec 9, 2003

Method of electroless plating copper on nitride barrier

IND TECH RES INST9 citations74
US6228733B1May 8, 2001

Non-selective epitaxial depostion technology

IND TECH RES INST14 citations74
US6046107AApr 4, 2000

Electroless copper employing hypophosphite as a reducing agent

IND TECH RES INST6 citations63
US9209293B2Dec 8, 2015

Integrated device having MOSFET cell array embedded with barrier Schottky diode

IND TECH RES INST3 citations62
US8878327B2Nov 4, 2014

Schottky barrier device having a plurality of double-recessed trenches

IND TECH RES INST2 citations62
US8956963B2Feb 17, 2015

Schottky barrier diode and fabricating method thereof

IND TECH RES INST1 citations48

HESTIA POWER INC

11 patents

NAT SCIENCE COUNCIL

2 patents

SHANGHAI HESTIA POWER INC

2 patents

IND TECHNOLOGYRES INST

1 patent

WINBOND ELECTRONICS CORP

1 patent

HESTIA POWER SHANGHAI TECH INC

1 patent

HUNG CHIEN-CHUNG

1 patent