Inventor
MURGAI RAJEEV
US12 patents
⚠️ This page may combine multiple inventors who share the name “MURGAI RAJEEV”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
FUJITSU LTD
9 patentsUS7383522B2Jun 3, 2008
Crosstalk-aware timing analysis
FUJITSU LTD202 citations98
US7890904B2Feb 15, 2011
Estimating jitter in a clock tree of a circuit and synthesizing a jitter-aware and skew-aware clock tree
FUJITSU LTD9 citations83
US7802215B2Sep 21, 2010
System and method for providing an improved sliding window scheme for clock mesh analysis
FUJITSU LTD10 citations82
US7313771B2Dec 25, 2007
Computing current in a digital circuit based on an accurate current model for library cells
FUJITSU LTD13 citations82
US7246335B2Jul 17, 2007
Analyzing substrate noise
FUJITSU LTD15 citations81
US7801718B2Sep 21, 2010
Analyzing timing uncertainty in mesh-based architectures
FUJITSU LTD11 citations78
US7197732B2Mar 27, 2007
Layout-driven, area-constrained design optimization
FUJITSU LTD9 citations72
US7788613B2Aug 31, 2010
Border-enhanced sliding window scheme (SWS) for determining clock timing in a mesh-based clock architecture
FUJITSU LTD4 citations62
US7725852B2May 25, 2010
Sliding window scheme (SWS) for determining clock timing in a mesh-based clock architecture
FUJITSU LTD1 citations52