Inventor
SIR JIUN HANN
MY34 patents
Patents
34 patentsUS9972589B1May 15, 2018
Integrated circuit package substrate with microstrip architecture and electrically grounded surface conductive layer
INTEL CORP47 citations93
US10515912B2Dec 24, 2019
Integrated circuit packages
INTEL CORP37 citations90
US6946737B2Sep 20, 2005
Robust interlocking via
INTEL CORP14 citations83
US7217651B2May 15, 2007
Interconnects with interlocks
INTEL CORP6 citations74
US11538633B2Dec 27, 2022
Combination stiffener and capacitor
INTEL CORP3 citations73
US10796999B2Oct 6, 2020
Floating-bridge interconnects and methods of assembling same
INTEL CORP4 citations73
US9778688B2Oct 3, 2017
Flexible system-in-package solutions for wearable devices
INTEL CORP5 citations73
US10998262B2May 4, 2021
Stripped redistrubution-layer fabrication for package-top embedded multi-die interconnect bridge
INTEL CORP1 citations72
US11205613B2Dec 21, 2021
Organic mold interconnects in shielded interconnects frames for integrated-circuit packages
INTEL CORP2 citations71
US7678616B2Mar 16, 2010
Thermal management method including a metallic layer directly on an integrated heat spreader and integrated circuit
INTEL CORP5 citations70
US7795736B2Sep 14, 2010
Interconnects with interlocks
INTEL CORP2 citations63
US12400952B2Aug 26, 2025
Stripped redistrubution-layer fabrication for package-top embedded multi-die interconnect bridge
INTEL CORP0 citations62
US11908793B2Feb 20, 2024
Stripped redistrubution-layer fabrication for package-top embedded multi-die interconnect bridge
INTEL CORP0 citations62
US11823994B2Nov 21, 2023
Systems and apparatuses for implementing a pad on solder mask (POSM) semiconductor substrate package
INTEL CORP0 citations62
US11658127B2May 23, 2023
RFI free picture frame metal stiffener
INTEL CORP1 citations62
US11658111B2May 23, 2023
Stripped redistrubution-layer fabrication for package-top embedded multi-die interconnect bridge
INTEL CORP0 citations62
US11587844B2Feb 21, 2023
Electronic device package on package (POP)
INTEL CORP0 citations62
US11393760B2Jul 19, 2022
Floating-bridge interconnects and methods of assembling same
INTEL CORP0 citations62
US11289414B2Mar 29, 2022
Systems, methods, and apparatuses for implementing a pad on solder mask (POSM) semiconductor substrate package
INTEL CORP0 citations62
US10923415B2Feb 16, 2021
Semiconductor package having integrated stiffener region
INTEL CORP0 citations62
US10256213B2Apr 9, 2019
Reduced-height electronic memory system and method
INTEL CORP1 citations62
US7745912B2Jun 29, 2010
Stress absorption layer and cylinder solder joint method and apparatus
INTEL CORP6 citations62
US7365007B2Apr 29, 2008
Interconnects with direct metalization and conductive polymer
INTEL CORP3 citations62
US11929295B2Mar 12, 2024
Multi-use package architecture
INTEL CORP0 citations61
US11699644B2Jul 11, 2023
Organic mold interconnects in shielded interconnects frames for integrated-circuit packages
INTEL CORP0 citations61
US12500155B2Dec 16, 2025
Electronic package with passive component between substrates
INTEL CORP0 citations60
US11264315B2Mar 1, 2022
Electronic package with passive component between substrates
INTEL CORP1 citations60
US7439618B2Oct 21, 2008
Integrated circuit thermal management method and apparatus
INTEL CORP3 citations59
US11264160B2Mar 1, 2022
Extended package air core inductor
INTEL CORP0 citations58
US12588511B2Mar 24, 2026
Shielding assembly for semiconductor packages
INTEL CORP0 citations51
US10163777B2Dec 25, 2018
Interconnects for semiconductor packages
INTEL CORP0 citations51
US11322434B2May 3, 2022
Top-to-bottom interconnects with molded lead-frame module for integrated-circuit packages
INTEL CORP0 citations50
US9960224B2May 1, 2018
Three capacitor stack and associated methods
INTEL CORP0 citations50
US10609813B2Mar 31, 2020
Capacitive interconnect in a semiconductor package
INTEL CORP0 citations41