Inventor

LOHMAN TERENCE J

US20 patents

⚠️ This page may combine multiple inventors who share the name “LOHMAN TERENCE J”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

LOHMAN TERENCE J

IBM

Arbitration logic for multiple bus computer system

System direct memory access (DMA) support logic for PCI based computer system

DMA controller including a FIFO register and a residual register for data buffering and having different operating modes

Dynamic bus sizing of DMA transfers

System having a bus interface unit for overriding a normal arbitration scheme after a system resource device has already gained control of a bus

Arbitration control logic for computer system having dual bus architecture

Bus interface logic for computer system having dual bus architecture

Error detection and recovery in a DMA controller

Controlling bus allocation using arbitration hold

Method and apparatus for arbitrating for a bus to enable split transaction bus protocols

Cpu bus allocation control

Boundary-scan bypass circuit for integrated circuit electronic component and circuit boards incorporating such circuits and components

Expandable high performance FIFO design which includes memory cells having respective cell multiplexors

HOFMANN RICHARD GERARD

Cooperative writes over the address channel of a bus

Cooperative writes over the address channel of a bus

Auxiliary writes over address channel

Auxiliary writes over address channel

QUALCOMM INC

Bus access arbitration scheme

Single bus command having transfer information for transferring data in a processing system

QUALCOMM INNOVATION CT INC

Method and apparatus for efficient, low-latency, streaming memory copies