Inventor
MATEESCU ROBERT EUGENIU
US21 patents
⚠️ This page may combine multiple inventors who share the name “MATEESCU ROBERT EUGENIU”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
HGST Netherlands BV
9 patentsUS9274884B2Mar 1, 2016
Encoding and decoding data to accommodate memory cells having stuck-at faults
HGST Netherlands BV7 citations83
US10025652B2Jul 17, 2018
Error location pointers for non volatile memory
HGST Netherlands BV2 citations73
US8812934B2Aug 19, 2014
Techniques for storing bits in memory cells having stuck-at faults
HGST Netherlands BV5 citations72
US8996955B2Mar 31, 2015
Techniques for storing data in stuck and unstable memory cells
HGST Netherlands BV2 citations62
US8943388B2Jan 27, 2015
Techniques for encoding and decoding using a combinatorial number system
HGST Netherlands BV2 citations62
US10146618B2Dec 4, 2018
Distributed data storage with reduced storage overhead using reduced-dependency erasure codes
HGST Netherlands BV1 citations51
US8887025B2Nov 11, 2014
Techniques for storing data in stuck memory cells
HGST Netherlands BV1 citations51
US9471227B2Oct 18, 2016
Implementing enhanced performance with read before write to phase change memory to avoid write cancellations
HGST Netherlands BV0 citations42
US9070483B2Jun 30, 2015
Encoding and decoding redundant bits to accommodate memory cells having stuck-at faults
HGST Netherlands BV0 citations41
WESTERN DIGITAL TECH INC
7 patentsUS10254982B2Apr 9, 2019
System and methodology for low latency error management within a shared non-volatile memory architecture
WESTERN DIGITAL TECH INC4 citations73
US9754682B2Sep 5, 2017
Implementing enhanced performance with read before write to phase change memory
WESTERN DIGITAL TECH INC3 citations73
US10379952B2Aug 13, 2019
Data recovery and regeneration using parity code
WESTERN DIGITAL TECH INC2 citations72
US10289489B2May 14, 2019
Update efficient consensus protocols for erasure coded data stores
WESTERN DIGITAL TECH INC3 citations68
US10373528B2Aug 6, 2019
Cell-level realization of burn after reading for NAND flash
WESTERN DIGITAL TECH INC0 citations52
US10360973B2Jul 23, 2019
Data mapping enabling fast read multi-level 3D NAND to improve lifetime capacity
WESTERN DIGITAL TECH INC0 citations52
US9836350B2Dec 5, 2017
Joint decoding of rewriting NVM error sectors
WESTERN DIGITAL TECH INC1 citations52
BANDIC ZVONIMIR Z
5 patentsUS8537481B1Sep 17, 2013
Shingled magnetic recording disk drive with minimization of the effect of far track erasure on adjacent data bands
BANDIC ZVONIMIR Z35 citations93
US8792272B2Jul 29, 2014
Implementing enhanced data partial-erase for multi-level cell (MLC) memory using threshold voltage-drift or resistance drift tolerant moving baseline memory data encoding
BANDIC ZVONIMIR Z6 citations84
US8793431B2Jul 29, 2014
Shingled magnetic recording disk drive with inter-band disk cache and minimization of the effect of far track erasure on adjacent data bands
BANDIC ZVONIMIR Z16 citations82
US8699266B2Apr 15, 2014
Implementing enhanced data write for multi-level cell (MLC) memory using threshold voltage-drift or resistance drift tolerant moving baseline memory data encoding
BANDIC ZVONIMIR Z4 citations73
US9208871B2Dec 8, 2015
Implementing enhanced data read for multi-level cell (MLC) memory using threshold voltage-drift or resistance drift tolerant moving baseline memory data encoding
BANDIC ZVONIMIR Z3 citations63