Inventor

WOO YOUNGTAG

US24 patents

⚠️ This page may combine multiple inventors who share the name “WOO YOUNGTAG”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

WOO YOUNGTAG

GLOBALFOUNDRIES INC

Methods of forming gate contact structures and cross-coupled contact structures for transistor devices

Vertical channel transistor-based semiconductor memory structure

Method for creating self-aligned compact contacts in an IC device meeting fabrication spacing constraints

Double sidewall image transfer process

Methods of forming gate contact structures and cross-coupled contact structures for transistor devices

Self-aligned double patterning process for two dimensional patterns

Utilization of block-mask and cut-mask for forming metal routing in an IC device

Methods to form merged spacers for use in fin generation in IC devices

Self-aligned gate cut method and multilayer gate-cut pillar structure

Structure with local contact for shorting a gate electrode to a source/drain region

Methods to utilize merged spacers for use in fin generation in tapered IC devices

Merged source/drain and gate contacts in SRAM bitcell

Metal segments as landing pads and local interconnects in an IC device

Gate structure for a transistor device with a novel pillar structure positioned thereabove

Gate contact structures and cross-coupled contact structures for transistor devices

Active contact and gate contact interconnect for mitigating adjacent gate electrode shortages

Interconnection designs using sidewall image transfer (SIT)

GLOBALFOUNDRIES US INC

Gate contact structures and cross-coupled contact structures for transistor devices

Gate contact structures and cross-coupled contact structures for transistor devices

WOO YOUNGTAG

Double sidewall image transfer process

GLOBALFOUNDIES INC

Methods of forming FinFET devices in different regions of an integrated circuit product

IBM

Transistor with recessed cross couple for gate contact over active region integration

YUAN LEI

Method for increasing the robustness of a double patterning router used to manufacture integrated circuit devices

INTEGRATED DEVICE TECH

Nitrogen implementation to minimize device variation