Inventor
BALLAGH JONATHAN B
US48 patents
⚠️ This page may combine multiple inventors who share the name “BALLAGH JONATHAN B”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
XILINX INC
37 patentsUS7546572B1Jun 9, 2009
Shared memory interface in a programmable logic device using partial reconfiguration
XILINX INC83 citations98
US7636653B1Dec 22, 2009
Point-to-point ethernet hardware co-simulation interface
XILINX INC22 citations93
US7433813B1Oct 7, 2008
Embedding a co-simulated hardware object in an event-driven simulator
XILINX INC21 citations93
US7007261B1Feb 28, 2006
Translation of an electronic integrated circuit design into hardware description language using circuit description template
XILINX INC27 citations93
US6911840B1Jun 28, 2005
Integrated circuit with overclocked dedicated logic circuitry
XILINX INC27 citations93
US7383478B1Jun 3, 2008
Wireless dynamic boundary-scan topologies for field
XILINX INC34 citations92
US7203632B2Apr 10, 2007
HDL co-simulation in a high-level modeling system
XILINX INC25 citations92
US7003751B1Feb 21, 2006
Specification of the hierarchy, connectivity, and graphical representation of a circuit design
XILINX INC31 citations92
US6883147B1Apr 19, 2005
Method and system for generating a circuit design including a peripheral component connected to a bus
XILINX INC52 citations92
US7739092B1Jun 15, 2010
Fast hardware co-simulation reset using partial bitstreams
XILINX INC38 citations91
US7707019B1Apr 27, 2010
Command buffering for hardware co-simulation
XILINX INC12 citations84
US7590137B1Sep 15, 2009
Parameterizable compact network processor for low-level communication with an integrated circuit
XILINX INC13 citations84
US7539953B1May 26, 2009
Method and apparatus for interfacing instruction processors and logic in an electronic circuit modeling system
XILINX INC8 citations84
US7478030B1Jan 13, 2009
Clock stabilization detection for hardware simulation
XILINX INC8 citations84
US7444603B1Oct 28, 2008
Transformation of graphs representing an electronic design in a high modeling system
XILINX INC9 citations84
US7376544B1May 20, 2008
Vector transfer during co-simulation
XILINX INC19 citations84
US7366651B1Apr 29, 2008
Co-simulation interface
XILINX INC14 citations84
US7346481B1Mar 18, 2008
Hardware co-simulation breakpoints in a high-level modeling system
XILINX INC18 citations84
US7328421B1Feb 5, 2008
Relocating blocks for netlist generation of an electronic system
XILINX INC11 citations84
US7284225B1Oct 16, 2007
Embedding a hardware object in an application system
XILINX INC17 citations84
US7184946B2Feb 27, 2007
Co-simulation via boundary scan interface
XILINX INC10 citations79
US7747423B1Jun 29, 2010
Systems and methods of co-simulation utilizing multiple PLDs in a boundary scan chain
XILINX INC7 citations74
US7363600B1Apr 22, 2008
Method of simulating bidirectional signals in a modeling system
XILINX INC7 citations74
US7207015B1Apr 17, 2007
Translation of an electronic integrated circuit design into hardware
XILINX INC8 citations74
US7068071B1Jun 27, 2006
Integrated circuit with overclocked dedicated logic circuitry
XILINX INC6 citations74
US7010664B1Mar 7, 2006
Configurable address generator and circuit using same
XILINX INC10 citations74
US7343572B1Mar 11, 2008
Vector interface to shared memory in simulating a circuit design
XILINX INC8 citations72
US7797677B1Sep 14, 2010
Using scripts for netlisting in a high-level modeling system
XILINX INC6 citations63
US7437280B1Oct 14, 2008
Hardware-based co-simulation on a PLD having an embedded processor
XILINX INC4 citations63
US7086030B1Aug 1, 2006
Incremental netlisting
XILINX INC6 citations63
US7934185B1Apr 26, 2011
Method of simulating bidirectional signals in a modeling system
XILINX INC5 citations62
US7346482B1Mar 18, 2008
Shared memory for co-simulation
XILINX INC4 citations61
US7870522B1Jan 11, 2011
Efficient communication of data between blocks in a high level modeling system
XILINX INC1 citations52
US7366998B1Apr 29, 2008
Efficient communication of data between blocks in a high level modeling system
XILINX INC0 citations52
US7287178B1Oct 23, 2007
Communication between clock domains of an electronic circuit
XILINX INC1 citations52
US7269811B1Sep 11, 2007
Method of and apparatus for specifying clock domains in electronic circuit designs
XILINX INC0 citations52
US7895564B1Feb 22, 2011
Using XTables to communicate in a high level modeling system
XILINX INC1 citations51
BALLAGH JONATHAN B
6 patentsUS8947452B1Feb 3, 2015
Mechanism for displaying visual clues to stacking order during a drag and drop operation
BALLAGH JONATHAN B46 citations93
US8091030B1Jan 3, 2012
Method and apparatus of graphical object selection in a web browser
BALLAGH JONATHAN B25 citations91
US8082139B1Dec 20, 2011
Displaying signals of a design block emulated in hardware co-simulation
BALLAGH JONATHAN B11 citations82
US9208174B1Dec 8, 2015
Non-language-based object search
BALLAGH JONATHAN B6 citations69
US8207969B1Jun 26, 2012
Method of abstracting a graphical object in a line art style suitable for printing and artwork-coloring
BALLAGH JONATHAN B2 citations61
US9620084B2Apr 11, 2017
Method and apparatus of graphical object selection in a web browser
BALLAGH JONATHAN B0 citations51