Inventor
KHURANA RANJAN
US13 patents
⚠️ This page may combine multiple inventors who share the name “KHURANA RANJAN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
MICRON TECHNOLOGY INC
10 patentsUS8796086B2Aug 5, 2014
Methods of forming an array of memory cells, methods of forming a plurality of field effect transistors, methods of forming source/drain regions and isolation trenches, and methods of forming a series of spaced trenches into a substrate
MICRON TECHNOLOGY INC4 citations82
US9583381B2Feb 28, 2017
Methods for forming semiconductor devices and semiconductor device structures
MICRON TECHNOLOGY INC3 citations72
US8889559B2Nov 18, 2014
Methods of forming a pattern on a substrate
MICRON TECHNOLOGY INC6 citations72
US8039340B2Oct 18, 2011
Methods of forming an array of memory cells, methods of forming a plurality of field effect transistors, methods of forming source/drain regions and isolation trenches, and methods of forming a series of spaced trenches into a substrate
MICRON TECHNOLOGY INC5 citations71
US9229328B2Jan 5, 2016
Methods of forming semiconductor device structures, and related semiconductor device structures
MICRON TECHNOLOGY INC5 citations70
US9741580B2Aug 22, 2017
Substrate mask patterns, methods of forming a structure on a substrate, methods of forming a square lattice pattern from an oblique lattice pattern, and methods of forming a pattern on a substrate
MICRON TECHNOLOGY INC0 citations52
US8937018B2Jan 20, 2015
Methods of forming a pattern on a substrate
MICRON TECHNOLOGY INC1 citations51
US8999852B2Apr 7, 2015
Substrate mask patterns, methods of forming a structure on a substrate, methods of forming a square lattice pattern from an oblique lattice pattern, and methods of forming a pattern on a substrate
MICRON TECHNOLOGY INC1 citations50
US9460998B2Oct 4, 2016
Semiconductor constructions and methods of forming semiconductor constructions
MICRON TECHNOLOGY INC0 citations48
US8889558B2Nov 18, 2014
Methods of forming a pattern on a substrate
MICRON TECHNOLOGY INC1 citations47
DAVIS NEAL L
2 patentsUS8389353B2Mar 5, 2013
Methods of forming an array of memory cells, methods of forming a plurality of field effect transistors, methods of forming source/drain regions and isolation trenches, and methods of forming a series of spaced trenches into a substrate
DAVIS NEAL L4 citations69
US8586429B2Nov 19, 2013
Methods of forming an array of memory cells, methods of forming a plurality of field effect transistors, methods of forming source/drain regions and isolation trenches, and methods of forming a series of spaced trenches into a substrate
DAVIS NEAL L1 citations58