Inventor
GRANATO SUZANNE
US9 patents
⚠️ This page may combine multiple inventors who share the name “GRANATO SUZANNE”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
IBM
6 patentsUS7251794B2Jul 31, 2007
Simulation testing of digital logic circuit designs
IBM30 citations88
US8935586B2Jan 13, 2015
Staggered start of BIST controllers and BIST engines
IBM6 citations69
US8612813B2Dec 17, 2013
Circuit and method for efficient memory repair
IBM3 citations61
US8381052B2Feb 19, 2013
Circuit and method for efficient memory repair
IBM2 citations61
US7360138B2Apr 15, 2008
Verification of the design of an integrated circuit background
IBM2 citations55
US7831879B2Nov 9, 2010
Generating test coverage bin based on simulation result
IBM1 citations43