Inventor

HSU CHIH-YU

TW35 patents

⚠️ This page may combine multiple inventors who share the name “HSU CHIH-YU”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

HSU CHIH-YU

TAIWAN SEMICONDUCTOR MFG CO LTD

Methods for forming STI regions in integrated circuits

Nano-sheet-based complementary metal-oxide-semiconductor devices with asymmetric inner spacers

Semiconductor device and method of manufacture

Multi-gate device and related methods

Eliminating fin mismatch using isolation last

Gate structure for multi-gate device and related methods

Nano-sheet-based complementary metal-oxide-semiconductor devices with asymmetric inner spacers

Methods for doping high-K metal gates for tuning threshold voltages

Multi-gate device and related methods

Semiconductor device and method

Multi-layer high-k gate dielectric structure

Multi-layer high-k gate dielectric structure

Semiconductor device and method of manufacture

Semiconductor device and method

Forming STI regions to separate semiconductor Fins

Semiconductor device and method of manufacture

Methods for doping high-k metal gates for tuning threshold voltages

Post gate dielectric processing for semiconductor device fabrication

Post gate dielectric processing for semiconductor device fabrication

Integrated circuit device with improved reliability

Multi-layer high-k gate dielectric structure

P-type semiconductor devices with different threshold voltages and methods of forming the same

REALTEK SEMICONDUCTOR CORP

Data-transmission-format conversion circuit and control method for data-transmission-format conversions between different high-speed data transmission interfaces

Error handling method and associated error handling architecture for transmission interfaces

Interface bridge circuit capable of reducing heat generation

Image signal processing method and image signal processor for noise reduction

USB interface system capable of automatically adjusting connection speed and power consumption capabilities and method thereof

AIR LIQUIDE

SiN selective etch to SiO2 with non-plasma dry process for 3D NAND device applications

Systems and methods for storage and supply of F3NO-free FNO gases and F3NO-free FNO gas mixtures for semiconductor processes

Methods of minimizing plasma-induced sidewall damage during low K etch processes

CHIA LIN SPORT CO LTD

Exercise platform

Rhythm fitness step apparatus

HUANG LEE-MAY

Photovoltaic electrochromic device

NATIONAL YANG-MING UNIV

Jaw motion tracking system and operating method using the same

LAIR LIQUIDE SA POUR LETUDE ET LEXPLOITATION DES PROCEDES GEORGES CLUADEQ

Methods for minimizing sidewall damage during low k etch processes