Inventor
GUAN YINGBING
CN34 patents
Patents
34 patentsUS12212655B2Jan 28, 2025
Processor with a hash cryptographic algorithm and data processing thereof
SHANGHAI ZHAOXIN SEMICONDUCTOR CO LTD2 citations74
US12149619B2Nov 19, 2024
Processor with an elliptic curve cryptographic algorithm and a data processing method thereof
SHANGHAI ZHAOXIN SEMICONDUCTOR CO LTD2 citations72
US12149620B2Nov 19, 2024
Processor with an elliptic curve cryptographic instruction for elliptic curve cryptographic algorithm and a data processing method thereof
SHANGHAI ZHAOXIN SEMICONDUCTOR CO LTD2 citations72
US11816487B2Nov 14, 2023
Method of converting extended instructions based on an emulation flag and retirement of corresponding microinstructions, device and system using the same
SHANGHAI ZHAOXIN SEMICONDUCTOR CO LTD1 citations72
US11366665B2Jun 21, 2022
Microprocessor with high-efficiency decoding of complex instructions
SHANGHAI ZHAOXIN SEMICONDUCTOR CO LTD2 citations72
US12288068B2Apr 29, 2025
Instruction simulation device and method thereof
SHANGHAI ZHAOXIN SEMICONDUCTOR CO LTD0 citations62
US12155763B2Nov 26, 2024
Processor with an elliptic curve cryptographic algorithm and a data processing method thereof
SHANGHAI ZHAOXIN SEMICONDUCTOR CO LTD2 citations62
US12155751B2Nov 26, 2024
Processor with block cipher algorithm, and a data encryption and decryption method operated by the processor
SHANGHAI ZHAOXIN SEMICONDUCTOR CO LTD0 citations62
US12020034B2Jun 25, 2024
Instruction execution method and instruction execution device
SHANGHAI ZHAOXIN SEMICONDUCTOR CO LTD0 citations62
US12014181B2Jun 18, 2024
Instruction execution method and instruction execution device
SHANGHAI ZHAOXIN SEMICONDUCTOR CO LTD0 citations62
US11995440B2May 28, 2024
Method and system for executing new instructions
SHANGHAI ZHAOXIN SEMICONDUCTOR CO LTD0 citations62
US11971821B2Apr 30, 2024
Computing system with write-back and invalidation in a hierarchical cache structure based on at least one designated key identification code
SHANGHAI ZHAOXIN SEMICONDUCTOR CO LTD1 citations62
US11914997B2Feb 27, 2024
Method and system for executing new instructions
SHANGHAI ZHAOXIN SEMICONDUCTOR CO LTD0 citations62
US11803387B2Oct 31, 2023
System for executing new instructions and method for executing new instructions
SHANGHAI ZHAOXIN SEMICONDUCTOR CO LTD0 citations62
US11803383B2Oct 31, 2023
Method and system for executing new instructions
SHANGHAI ZHAOXIN SEMICONDUCTOR CO LTD0 citations62
US11803381B2Oct 31, 2023
Instruction simulation device and method thereof
SHANGHAI ZHAOXIN SEMICONDUCTOR CO LTD0 citations62
US11733760B2Aug 22, 2023
Electronic device and method thereof for controlling power consumption of electronic device in busy-waiting state
SHANGHAI ZHAOXIN SEMICONDUCTOR CO LTD0 citations62
US11669328B2Jun 6, 2023
Method and system for converting instructions
SHANGHAI ZHAOXIN SEMICONDUCTOR CO LTD0 citations62
US11625247B2Apr 11, 2023
System for executing new instructions and method for executing new instructions
SHANGHAI ZHAOXIN SEMICONDUCTOR CO LTD0 citations62
US11604643B2Mar 14, 2023
System for executing new instructions and method for executing new instructions
SHANGHAI ZHAOXIN SEMICONDUCTOR CO LTD0 citations62
US12013782B2Jun 18, 2024
Processor with protection of an isolated memory and protection method for the isolated memory accessible only by a trusted core
SHANGHAI ZHAOXIN SEMICONDUCTOR CO LTD0 citations58
US12493724B2Dec 9, 2025
Computing system and trusted computing method
SHANGHAI ZHAOXIN SEMICONDUCTOR CO LTD0 citations51
US12362944B2Jul 15, 2025
Processor with an elliptic curve cryptographic algorithm and a data processing method thereof
SHANGHAI ZHAOXIN SEMICONDUCTOR CO LTD0 citations51
US12323521B2Jun 3, 2025
Processor with an elliptic curve cryptographic algorithm and a data processing method thereof
SHANGHAI ZHAOXIN SEMICONDUCTOR CO LTD0 citations51
US12222860B2Feb 11, 2025
Processor and method designating an in-core cache of a hierarchical cache system to perform writing-back and invalidation of cached data
SHANGHAI ZHAOXIN SEMICONDUCTOR CO LTD0 citations51
US12086065B2Sep 10, 2024
Computing system with direct invalidation in a hierarchical cache structure based on at least one designated key identification code
SHANGHAI ZHAOXIN SEMICONDUCTOR CO LTD0 citations51
US12038839B2Jul 16, 2024
Processor and method for designating a demotion target to be demoted from an in-core cache structure to an out-of-core cache structure
SHANGHAI ZHAOXIN SEMICONDUCTOR CO LTD0 citations51
US11966738B2Apr 23, 2024
Processor and method for flushing translation lookaside buffer according to designated key identification code
SHANGHAI ZHAOXIN SEMICONDUCTOR CO LTD0 citations51
US11789736B2Oct 17, 2023
Method and system for executing new instructions
SHANGHAI ZHAOXIN SEMICONDUCTOR CO LTD0 citations51
US12430163B2Sep 30, 2025
Method for entering system management mode, processor, and computer system
SHANGHAI ZHAOXIN SEMICONDUCTOR CO LTD0 citations50
US12222868B2Feb 11, 2025
Processor and operating method for a homogeneous dual computing system
SHANGHAI ZHAOXIN SEMICONDUCTOR CO LTD0 citations48
US12580764B2Mar 17, 2026
Processor and operating method for a homogeneous dual computing system
SHANGHAI ZHAOXIN SEMICONDUCTOR CO LTD0 citations45
US12222867B2Feb 11, 2025
Processor, computer system, and method for flushing hierarchical cache structure based on a designated key identification code and a designated address
SHANGHAI ZHAOXIN SEMICONDUCTOR CO LTD0 citations45
US10776116B2Sep 15, 2020
Instruction translation circuit, processor circuit and executing method thereof
SHANGHAI ZHAOXIN SEMICONDUCTOR CO LTD0 citations30