Inventor
YINDEEPOL WIPAWAN
US7 patents
Patents
7 patentsUS5914523AJun 22, 1999
Semiconductor device trench isolation structure with polysilicon bias voltage contact
NAT SEMICONDUCTOR CORP137 citations98
US6121148ASep 19, 2000
Semiconductor device trench isolation structure with polysilicon bias voltage contact
NAT SEMICONDUCTOR CORP100 citations97
US5811315ASep 22, 1998
Method of forming and planarizing deep isolation trenches in a silicon-on-insulator (SOI) structure
NAT SEMICONDUCTOR CORP75 citations94
US5581110ADec 3, 1996
Integrated circuit with trenches and an oxygen barrier layer
NAT SEMICONDUCTOR CORP62 citations94
US6362064B2Mar 26, 2002
Elimination of walkout in high voltage trench isolated devices
NAT SEMICONDUCTOR CORP40 citations91
US5911109AJun 8, 1999
Method of forming an integrated circuit including filling and planarizing a trench having an oxygen barrier layer
NAT SEMICONDUCTOR CORP27 citations91
US6979879B1Dec 27, 2005
Trim zener using double poly process
NAT SEMICONDUCTOR CORP8 citations73