Inventor
NELSON BRADLEY S
US14 patents
⚠️ This page may combine multiple inventors who share the name “NELSON BRADLEY S”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
IBM
13 patentsUS7484192B2Jan 27, 2009
Method for modeling metastability decay through latches in an integrated circuit model
IBM26 citations92
US7484196B2Jan 27, 2009
Method for asynchronous clock modeling in an integrated circuit simulation
IBM24 citations92
US7877717B2Jan 25, 2011
Accurately modeling an asynchronous interface using expanded logic elements
IBM20 citations91
US7299436B2Nov 20, 2007
System and method for accurately modeling an asynchronous interface using expanded logic elements
IBM27 citations91
US7995619B2Aug 9, 2011
Methods and arrangements to model an asynchronous interface
IBM11 citations83
US7302659B2Nov 27, 2007
System and method for unfolding/replicating logic paths to facilitate propagation delay modeling
IBM12 citations83
US7447620B2Nov 4, 2008
Modeling asynchronous behavior from primary inputs and latches
IBM9 citations81
US7448015B2Nov 4, 2008
Method and system for unfolding/replicating logic paths to facilitate modeling of metastable value propagation
IBM6 citations73
US7426461B2Sep 16, 2008
Method, system and program product for providing a configuration specification language supporting incompletely specified configuration entities
IBM3 citations63
US7870528B2Jan 11, 2011
Method and system for unfolding/replicating logic paths to facilitate modeling of metastable value propagation
IBM5 citations62
US7453759B2Nov 18, 2008
Clock-gated model transformation for asynchronous testing of logic targeted for free-running, data-gated logic
IBM3 citations62
US7885801B2Feb 8, 2011
Modeling asynchronous behavior from primary inputs and latches
IBM2 citations60
US7519524B2Apr 14, 2009
Program product for providing a configuration specification language supporting incompletely specified configuration entities
IBM1 citations52