Inventor

HYUSEINOVA NEVIN

ES6 patents

⚠️ This page may combine multiple inventors who share the name “HYUSEINOVA NEVIN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

INTEL CORP

2 patents

US9645942B2May 9, 2017

Method for pinning data in large cache in multi-level memory system

INTEL CORP2 citations68

US9558120B2Jan 31, 2017

Method, apparatus and system to cache sets of tags of an off-die cache memory

INTEL CORP3 citations65

HYUSEINOVA NEVIN

2 patents

US9262336B2Feb 16, 2016

Page miss handler including wear leveling logic

HYUSEINOVA NEVIN3 citations68

US9075746B2Jul 7, 2015

Utility and lifetime based cache replacement policy

HYUSEINOVA NEVIN1 citations46

CAI QIONG

1 patent

US9003126B2Apr 7, 2015

Apparatus, system and method for adaptive cache replacement in a non-volatile main memory system

CAI QIONG10 citations78

OZDEMIR SERKAN

1 patent

US9405681B2Aug 2, 2016

Workload adaptive address mapping

OZDEMIR SERKAN1 citations47