Inventor

ABOULENEIN NAGI

US23 patents

⚠️ This page may combine multiple inventors who share the name “ABOULENEIN NAGI”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

ABOULENEIN NAGI

INTEL CORP

Prefetching data for peripheral component interconnect devices

Method and apparatus for memory access scheduling to reduce memory access latency

Integrated error checking and correction (ECC) in byte mode memory devices

Dynamic power measurement and estimation to improve memory subsystem power performance

Shared command address (C/A) bus for multiple memory channels

Prefetch optimization in shared resource multi-core systems

Interference testing

Coarse tag replacement

Configuration of data strobes

Apparatus and method to dynamically expand associativity of a cache memory

Interference testing

AMPERE COMPUTING LLC

Integrated error correction code (ECC) and parity protection in memory control circuits for increased memory utilization

Parity protected memory blocks merged with error correction code (ECC) protected blocks in a codeword for increased memory utilization

Parity protected memory blocks merged with error correction code (ECC) protected blocks in a codeword for increased memory utilization

Techniques for memory resource control using memory resource partitioning and monitoring

Method, apparatus, and system for run-time checking of memory tags in a processor-based system

Extending functionality of memory controllers in a processor-based device

Address-range memory mirroring in a computer system, and related methods

Extending functionality of memory controllers using a loopback mode for testing in a processor-based device

Component die validation built-in self-test (VBIST) engine

TANG PUQI P

Prefetch optimization in shared resource multi-core systems

INTEL CORPORATIOON

Method and apparatus for out of order memory scheduling

HOSSAIN MD ALTAF

Configuration of data strobes