Inventor
KHALAF BILAL
US20 patents
Patents
20 patentsUS9871007B2Jan 16, 2018
Packaged integrated circuit device with cantilever structure
INTEL CORP20 citations92
US11145632B2Oct 12, 2021
High density die package configuration on system boards
INTEL CORP3 citations68
US10879152B2Dec 29, 2020
Through mold via (TMV) using stacked modular mold rings
INTEL CORP2 citations68
US11894334B2Feb 6, 2024
Dual head capillary design for vertical wire bond
INTEL CORP0 citations61
US11848311B2Dec 19, 2023
Microelectronic packages having a die stack and a device within the footprint of the die stack
INTEL CORP0 citations61
US11329027B2May 10, 2022
Microelectronic packages having a die stack and a device within the footprint of the die stack
INTEL CORP0 citations61
US11373974B2Jun 28, 2022
Electronic device packages and methods for maximizing electrical current to dies and minimizing bond finger size
INTEL CORP0 citations60
US11064612B2Jul 13, 2021
Buried electrical debug access port
INTEL CORP0 citations59
US10847450B2Nov 24, 2020
Compact wirebonding in stacked-chip system in package, and methods of making same
INTEL CORP1 citations59
US11710674B2Jul 25, 2023
Embedded component and methods of making the same
INTEL CORP0 citations54
US11315843B2Apr 26, 2022
Embedded component and methods of making the same
INTEL CORP0 citations54
US11700696B2Jul 11, 2023
Buried electrical debug access port
INTEL CORP0 citations53
US11817438B2Nov 14, 2023
System in package with interconnected modules
INTEL CORP0 citations51
US9972610B2May 15, 2018
System-in-package logic and method to control an external packaged memory device
INTEL CORP0 citations51
US11811182B2Nov 7, 2023
Solderless BGA interconnect
INTEL CORP0 citations50
US10490516B2Nov 26, 2019
Packaged integrated circuit device with cantilever structure
INTEL CORP0 citations50
US10304814B2May 28, 2019
I/O layout footprint for multiple 1LM/2LM configurations
INTEL CORP0 citations49
US10090261B2Oct 2, 2018
Microelectronic package debug access ports and methods of fabricating the same
INTEL CORP0 citations48
US9646952B2May 9, 2017
Microelectronic package debug access ports
INTEL CORP0 citations48
US10475766B2Nov 12, 2019
Microelectronics package providing increased memory component density
INTEL CORP0 citations40