Inventor

KUROSAWA YASUHIKO

JP43 patents

⚠️ This page may combine multiple inventors who share the name “KUROSAWA YASUHIKO”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

KUROSAWA YASUHIKO

KIOXIA CORP

Semiconductor device and semiconductor storage device

Nonvolatile memory that stores temperature information therein

Semiconductor device and semiconductor storage device

Memory system and information processing system

Semiconductor device and semiconductor storage device

Soft error detection and correction for data storage devices

Efficient soft decoding of error correction code via extrinsic bit information

Generation of programming parameters for non-volatile memory device based on physical device parameters

System and method for dynamic compensation for multiple interference sources in non-volatile memory storage devices

Memory system and information processing system

Soft error detection and correction for data storage devices

Adapting flash memory programming parameters for high endurance and steady performance

Bit error rate estimation and classification in NAND flash memory

Dynamic interference compensation for soft decoding in non-volatile memory storage devices

Deep neural network implementation for concatenated codes

Decoding device and decoding method

System and method for dynamic inter-cell interference compensation in non-volatile memory storage devices

Nonvolatile memory

Systems and methods of decoding error correction code of a memory device with dynamic bit error estimation

System and method for determining optimal program parameters in non-volatile memory systems

TOSHIBA KK

Memory controller and memory control system

Cache flush unit

Integrated circuit device having clock frequency changing function, computer system using the integrated circuit device and clock frequency changing method

Semiconductor memory device

Memory controller, nonvolatile semiconductor memory device and memory system

Systems and methods for increasing yield of devices having cache memories by inhibiting use of defective cache entries

Virtual address cache memory, processor and multiprocessor

Semiconductor memory device

Systems and methods for managing communication between master and slave devices

System and method for a high-speed shift-type buffer

Semiconductor device and temperature control method of semiconductor device

TOSHIBA MEMORY CORP

Adapting flash memory programming parameters for high endurance and steady performance

Bit error rate estimation for NAND flash memory

Randomization of data using a plurality of types of pseudorandom number generators

Semiconductor memory device that randomizes data and randomizer thereof

Semiconductor device and current control method of semiconductor device

Memory controller, storage device, and read retry method

Randomization of data using a plurality of types of pseudorandom number generators

Semiconductor memory device that randomizes data and randomizer thereof

Bit error rate estimation for NAND flash memory

Memory system and method of controlling memory system for calculating voltage value for reading data

KUROSAWA YASUHIKO

Effective address cache memory, processor and effective address caching method

YASUFUKU KENTA

Virtual address cache memory, processor and multiprocessor