P

Inventor

TYBERG CHRISTY S

US31 patents
⚠️ This page may combine multiple inventors who share the name “TYBERG CHRISTY S”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

IBM

25 patents
US7394089B2Jul 1, 2008

Heat-shielded low power PCM-based reprogrammable EFUSE device

IBM76 citations98
US7388273B2Jun 17, 2008

Reprogrammable fuse structure and method

IBM73 citations98
US7365378B2Apr 29, 2008

MOSFET structure with ultra-low K spacer

IBM32 citations92
US7057287B2Jun 6, 2006

Dual damascene integration of ultra low dielectric constant porous materials

IBM34 citations92
US6982227B2Jan 3, 2006

Single and multilevel rework

IBM16 citations91
US6674168B1Jan 6, 2004

Single and multilevel rework

IBM17 citations91
US7960808B2Jun 14, 2011

Reprogrammable fuse structure and method

IBM8 citations84
US7407879B2Aug 5, 2008

Chemical planarization performance for copper/low-k interconnect structures

IBM10 citations84
US7338895B2Mar 4, 2008

Method for dual damascene integration of ultra low dielectric constant porous materials

IBM9 citations84
US6783862B2Aug 31, 2004

Toughness, adhesion and smooth metal lines of porous low k dielectric interconnect structures

IBM12 citations82
US7737561B2Jun 15, 2010

Dual damascene integration of ultra low dielectric constant porous materials

IBM5 citations74
US7491965B2Feb 17, 2009

Heat-shielded low power PCM-based reprogrammable eFUSE device

IBM6 citations74
US7187081B2Mar 6, 2007

Polycarbosilane buried etch stops in interconnect structures

IBM7 citations74
US6933586B2Aug 23, 2005

Porous low-k dielectric interconnects with improved adhesion produced by partial burnout of surface porogens

IBM11 citations74
US6844257B2Jan 18, 2005

Porous low-k dielectric interconnects with improved adhesion produced by partial burnout of surface porogens

IBM5 citations74
US6638878B2Oct 28, 2003

Film planarization for low-k polymers used in semiconductor structures

IBM10 citations74
US7071539B2Jul 4, 2006

Chemical planarization performance for copper/low-k interconnect structures

IBM8 citations73
US8017522B2Sep 13, 2011

Mechanically robust metal/low-κ interconnects

IBM5 citations71
US7755921B2Jul 13, 2010

Method and apparatus for fabricating sub-lithography data tracks for use in magnetic shift register memory devices

IBM5 citations63
US7396758B2Jul 8, 2008

Polycarbosilane buried etch stops in interconnect structures

IBM4 citations63
US6818285B2Nov 16, 2004

Composition and method to achieve reduced thermal expansion in polyarylene networks

IBM3 citations58
US7879717B2Feb 1, 2011

Polycarbosilane buried etch stops in interconnect structures

IBM0 citations52
US7598169B2Oct 6, 2009

Method to remove beol sacrificial materials and chemical residues by irradiation

IBM1 citations52
US7329600B2Feb 12, 2008

Low dielectric semiconductor device and process for fabricating the same

IBM1 citations52
US6864180B2Mar 8, 2005

Method for reworking low-k polymers used in semiconductor structures

IBM0 citations49

TYBERG CHRISTY S

2 patents

HEDRICK JEFFREY C

1 patent

VIRGINIA POLYTECHNIC INST & ST

1 patent

LIN QINGHUANG

1 patent

BURR GEOFFREY W

1 patent