Inventor
LINIGER ERIC G
US22 patents
⚠️ This page may combine multiple inventors who share the name “LINIGER ERIC G”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
IBM
18 patentsUS10418277B2Sep 17, 2019
Air gap spacer formation for nano-scale semiconductor devices
IBM159 citations99
US9892961B1Feb 13, 2018
Air gap spacer formation for nano-scale semiconductor devices
IBM49 citations98
US6271102B1Aug 7, 2001
Method and system for dicing wafers, and semiconductor structures incorporating the products thereof
IBM125 citations98
US6734090B2May 11, 2004
Method of making an edge seal for a semiconductor device
IBM605 citations97
US6915795B2Jul 12, 2005
Method and system for dicing wafers, and semiconductor structures incorporating the products thereof
IBM20 citations92
US7163883B2Jan 16, 2007
Edge seal for a semiconductor device
IBM27 citations91
US6222145B1Apr 24, 2001
Mechanical strength die sorting
IBM22 citations89
US10115629B2Oct 30, 2018
Air gap spacer formation for nano-scale semiconductor devices
IBM8 citations84
US7491578B1Feb 17, 2009
Method of forming crack trapping and arrest in thin film structures
IBM8 citations83
US7517790B2Apr 14, 2009
Method and structure to enhance temperature/humidity/bias performance of semiconductor devices by surface modification
IBM7 citations74
US9281211B2Mar 8, 2016
Nanoscale interconnect structure
IBM5 citations73
US6600213B2Jul 29, 2003
Semiconductor structure and package including a chip having chamfered edges
IBM7 citations73
US7573130B1Aug 11, 2009
Crack trapping and arrest in thin film structures
IBM5 citations61
US10309884B2Jun 4, 2019
Predicting semiconductor package warpage
IBM1 citations57
US9613900B2Apr 4, 2017
Nanoscale interconnect structure
IBM1 citations52
US7678673B2Mar 16, 2010
Strengthening of a structure by infiltration
IBM0 citations52
US7998880B2Aug 16, 2011
Low k dielectric CVD film formation process with in-situ imbedded nanolayers to improve mechanical properties
IBM0 citations51
US9772268B2Sep 26, 2017
Predicting semiconductor package warpage
IBM0 citations47