Inventor
HORIBE AKIHIRO
JP51 patents
⚠️ This page may combine multiple inventors who share the name “HORIBE AKIHIRO”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
IBM
47 patentsUS10107966B1Oct 23, 2018
Single-mode polymer waveguide connector assembly
IBM37 citations98
US7548674B1Jun 16, 2009
Alignment method for circular multi-core optical fiber
IBM27 citations93
US10170443B1Jan 1, 2019
Debonding chips from wafer
IBM7 citations84
US9887119B1Feb 6, 2018
Multi-chip package assembly
IBM12 citations84
US11574848B2Feb 7, 2023
Underfill injection for electronic devices
IBM2 citations73
US11114308B2Sep 7, 2021
Controlling of height of high-density interconnection structure on substrate
IBM3 citations73
US10622311B2Apr 14, 2020
High-density interconnecting adhesive tape
IBM3 citations73
US10529665B2Jan 7, 2020
High-density interconnecting adhesive tape
IBM3 citations73
US10460971B2Oct 29, 2019
Multi-chip package assembly
IBM4 citations73
US10317625B2Jun 11, 2019
Polymer waveguide (PWG) connector assembly having both cores and cladding partially exposed
IBM1 citations73
US10302868B2May 28, 2019
Polymer waveguide connector assembly method using cores and cladding that are both partially exposed
IBM1 citations73
US9721812B2Aug 1, 2017
Optical device with precoated underfill
IBM2 citations73
US9586281B2Mar 7, 2017
Forming a solder joint between metal layers
IBM2 citations72
US6765634B2Jul 20, 2004
Liquid crystal display device and display device
IBM10 citations70
US10133003B1Nov 20, 2018
Single-mode polymer waveguide connector assembly
IBM1 citations63
US9893031B2Feb 13, 2018
Chip mounting structure
IBM1 citations63
US12142603B2Nov 12, 2024
Bonding of bridge to multiple semiconductor chips
IBM0 citations62
US12094825B2Sep 17, 2024
Interconnection between chips by bridge chip
IBM0 citations62
US12087596B2Sep 10, 2024
Controlling of height of high-density interconnection structure on substrate
IBM0 citations62
US11908723B2Feb 20, 2024
Silicon handler with laser-release layers
IBM0 citations62
US11848272B2Dec 19, 2023
Interconnection between chips by bridge chip
IBM0 citations62
US11735575B2Aug 22, 2023
Bonding of bridge to multiple semiconductor chips
IBM1 citations62
US11637325B2Apr 25, 2023
Large capacity solid state battery
IBM0 citations62
US11320419B2May 3, 2022
Sampling of breath gas
IBM0 citations62
US11211638B2Dec 28, 2021
Large capacity solid state battery
IBM1 citations62
US11069917B2Jul 20, 2021
Stacked film battery architecture
IBM0 citations62
US11063288B2Jul 13, 2021
Stacked film battery architecture
IBM0 citations62
US10388578B2Aug 20, 2019
Wafer scale testing and initialization of small die chips
IBM1 citations62
US10325839B2Jun 18, 2019
Reduction of stress in via structure
IBM1 citations62
US7217026B2May 15, 2007
Illuminator, liquid crystal display comprising it and lamp socket
IBM3 citations62
US10903526B2Jan 26, 2021
Electron device stack structure
IBM0 citations61
US12456656B2Oct 28, 2025
Multichip interconnect package
IBM0 citations60
US12315775B2May 27, 2025
Underfill vacuum process
IBM0 citations59
US12532670B2Jan 20, 2026
Vertical transmon structure and its fabrication process
IBM0 citations52
US11316143B2Apr 26, 2022
Stacked device structure
IBM0 citations52
US10679912B2Jun 9, 2020
Wafer scale testing and initialization of small die chips
IBM0 citations52
US10672638B2Jun 2, 2020
Picking up irregular semiconductor chips
IBM0 citations52
US10431847B2Oct 1, 2019
Stacked film battery architecture
IBM0 citations52
US10424510B2Sep 24, 2019
Solder fill into high aspect through holes
IBM0 citations52
US10388566B2Aug 20, 2019
Solder fill into high aspect through holes
IBM0 citations52
US10141278B2Nov 27, 2018
Chip mounting structure
IBM0 citations52
US9466533B2Oct 11, 2016
Semiconductor structure including a through electrode, and method for forming the same
IBM1 citations52
US9373545B2Jun 21, 2016
Semiconductor structure including a through electrode, and method for forming the same
IBM0 citations52
US10679916B2Jun 9, 2020
Circuit module and manufacturing method thereof
IBM0 citations51
US10252363B2Apr 9, 2019
Forming a solder joint between metal layers
IBM0 citations51
US10074583B2Sep 11, 2018
Circuit module and manufacturing method thereof
IBM1 citations51
US12519061B2Jan 6, 2026
Multichip interconnect package fine jet underfill
IBM0 citations48
NITTO JUSHI KOGYO KABUSHIKI KA
1 patentENPLAS CORP
1 patentTESSERA INC
1 patentShowing the top 50 of 51 patents by PatentIndex Score.