Inventor

BANSAL JAI P

US11 patents

⚠️ This page may combine multiple inventors who share the name “BANSAL JAI P”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

BAE SYSTEMS INFORMATION

4 patents

US6765245B2Jul 20, 2004

Gate array core cell for VLSI ASIC devices

BAE SYSTEMS INFORMATION224 citations98

US6944843B2Sep 13, 2005

Method for providing a cell-based ASIC device with multiple power supply voltages

BAE SYSTEMS INFORMATION41 citations92

US7239177B2Jul 3, 2007

High voltage tolerant off chip driver circuit

BAE SYSTEMS INFORMATION8 citations73

US7418692B2Aug 26, 2008

Method for designing structured ASICS in silicon processes with three unique masking steps

BAE SYSTEMS INFORMATION4 citations62

IBM

3 patents

US4555721ANov 26, 1985

Structure of stacked, complementary MOS field effect transistor circuits

IBM44 citations92

US4467518AAug 28, 1984

Process for fabrication of stacked, complementary MOS field effect transistor circuits

IBM52 citations92

US4418401ANov 29, 1983

Latent image ram cell

IBM10 citations73

LORAL FEDERAL SYSTEMS COMPANY

1 patent

US5504703AApr 2, 1996

Single event upset hardened CMOS latch circuit

LORAL FEDERAL SYSTEMS COMPANY94 citations95

LOCKHEED CORP

1 patent

US5858817AJan 12, 1999

Process to personalize master slice wafers and fabricate high density VLSI components with a single masking step

LOCKHEED CORP16 citations73

BANSAL JAI P

1 patent

US8975920B2Mar 10, 2015

Programmable transceiver circuit

BANSAL JAI P4 citations67

BAE SYSTEM INFORMATION AND ELECTRIC SYSTEMS INTEGRATION INC

1 patent

US7895559B2Feb 22, 2011

Method for designing structured ASICs in silicon processes with three unique masking steps

BAE SYSTEM INFORMATION AND ELECTRIC SYSTEMS INTEGRATION INC3 citations56