Inventor
LEE MING-YI
US22 patents
⚠️ This page may combine multiple inventors who share the name “LEE MING-YI”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
LSI LOGIC CORP
11 patentsUS5851890ADec 22, 1998
Process for forming integrated circuit structure with metal silicide contacts using notched sidewall spacer on gate electrode
LSI LOGIC CORP88 citations95
US6613637B1Sep 2, 2003
Composite spacer scheme with low overlapped parasitic capacitance
LSI LOGIC CORP44 citations92
US6391768B1May 21, 2002
Process for CMP removal of excess trench or via filler metal which inhibits formation of concave regions on oxide surface of integrated circuit structure
LSI LOGIC CORP28 citations92
US6737342B1May 18, 2004
Composite spacer scheme with low overlapped parasitic capacitance
LSI LOGIC CORP15 citations89
US7001823B1Feb 21, 2006
Method of manufacturing a shallow trench isolation structure with low trench parasitic capacitance
LSI LOGIC CORP11 citations84
US6586332B1Jul 1, 2003
Deep submicron silicide blocking
LSI LOGIC CORP14 citations84
US6727165B1Apr 27, 2004
Fabrication of metal contacts for deep-submicron technologies
LSI LOGIC CORP6 citations74
US6319836B1Nov 20, 2001
Planarization system
LSI LOGIC CORP9 citations73
US6127286AOct 3, 2000
Apparatus and process for deposition of thin film on semiconductor substrate while inhibiting particle formation and deposition
LSI LOGIC CORP7 citations63
US8021955B1Sep 20, 2011
Method characterizing materials for a trench isolation structure having low trench parasitic capacitance
LSI LOGIC CORP3 citations62
US6989331B2Jan 24, 2006
Hard mask removal
LSI LOGIC CORP4 citations58
TAIWAN SEMICONDUCTOR MFG
5 patentsUS8965102B2Feb 24, 2015
System and method for defect analysis of a substrate
TAIWAN SEMICONDUCTOR MFG8 citations80
US6315649B1Nov 13, 2001
Wafer mounting plate for a polishing apparatus and method of using
TAIWAN SEMICONDUCTOR MFG18 citations77
US6604257B1Aug 12, 2003
Apparatus and method for cleaning a conduit
TAIWAN SEMICONDUCTOR MFG8 citations72
US8665654B2Mar 4, 2014
Memory edge cell
TAIWAN SEMICONDUCTOR MFG1 citations52
US6916700B1Jul 12, 2005
Mixed-mode process
TAIWAN SEMICONDUCTOR MFG0 citations39
TAIWAN SEMICONDUCTOR MFG CO LTD
3 patentsUS9449656B2Sep 20, 2016
Memory with bit cell header transistor
TAIWAN SEMICONDUCTOR MFG CO LTD9 citations84
US9412742B2Aug 9, 2016
Layout design for manufacturing a memory cell
TAIWAN SEMICONDUCTOR MFG CO LTD8 citations84
US9734572B2Aug 15, 2017
System and method for defect analysis of a substrate
TAIWAN SEMICONDUCTOR MFG CO LTD4 citations68